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authorAlan Mishchenko <alanmi@berkeley.edu>2012-08-26 09:31:43 -0700
committerAlan Mishchenko <alanmi@berkeley.edu>2012-08-26 09:31:43 -0700
commit889ed19c1c8c56e0d888876ed0b011275eafcaf8 (patch)
tree263feec77f49a48816c5f7a40fc423fade111f8c /src/map
parent137f0347f089ecb3e23e509f4081a99ea95e3077 (diff)
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Compiler warnings.
Diffstat (limited to 'src/map')
-rw-r--r--src/map/scl/sclTime.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/map/scl/sclTime.c b/src/map/scl/sclTime.c
index 761c7eab..883b1ddd 100644
--- a/src/map/scl/sclTime.c
+++ b/src/map/scl/sclTime.c
@@ -132,7 +132,7 @@ float Abc_SclTotalArea( SC_Man * p, Vec_Ptr_t * vNodes )
Vec_Flt_t * Abc_SclFindWireCaps( SC_Man * p, Vec_Ptr_t * vNodes )
{
Vec_Flt_t * vCaps = NULL;
- SC_WireLoad * pWL;
+ SC_WireLoad * pWL = NULL;
int i, Entry, EntryPrev, EntryMax;
p->pWireLoadUsed = NULL;
if ( p->pLib->default_wire_load_sel )