summaryrefslogtreecommitdiffstats
path: root/src/map
diff options
context:
space:
mode:
Diffstat (limited to 'src/map')
-rw-r--r--src/map/if/ifCut.c24
-rw-r--r--src/map/if/ifMap.c5
-rw-r--r--src/map/if/ifTruth.c1
-rw-r--r--src/map/mio/mio.c22
-rw-r--r--src/map/mio/mio.h1
-rw-r--r--src/map/mio/mioUtils.c93
-rw-r--r--src/map/scl/scl.c15
-rw-r--r--src/map/scl/sclBufSize.c2
-rw-r--r--src/map/scl/sclBuffer.c2
9 files changed, 146 insertions, 19 deletions
diff --git a/src/map/if/ifCut.c b/src/map/if/ifCut.c
index ad37b77f..2d6889c0 100644
--- a/src/map/if/ifCut.c
+++ b/src/map/if/ifCut.c
@@ -608,6 +608,10 @@ static inline int If_ManSortCompare( If_Man_t * p, If_Cut_t * pC0, If_Cut_t * pC
return -1;
if ( pC0->Delay > pC1->Delay + p->fEpsilon )
return 1;
+ if ( pC0->fUseless < pC1->fUseless )
+ return -1;
+ if ( pC0->fUseless > pC1->fUseless )
+ return 1;
return 0;
}
if ( p->SortMode == 0 ) // delay
@@ -632,6 +636,10 @@ static inline int If_ManSortCompare( If_Man_t * p, If_Cut_t * pC0, If_Cut_t * pC
return -1;
if ( pC0->Power > pC1->Power + p->fEpsilon )
return 1;
+ if ( pC0->fUseless < pC1->fUseless )
+ return -1;
+ if ( pC0->fUseless > pC1->fUseless )
+ return 1;
return 0;
}
assert( p->SortMode == 2 ); // delay old
@@ -639,6 +647,10 @@ static inline int If_ManSortCompare( If_Man_t * p, If_Cut_t * pC0, If_Cut_t * pC
return -1;
if ( pC0->Delay > pC1->Delay + p->fEpsilon )
return 1;
+ if ( pC0->fUseless < pC1->fUseless )
+ return -1;
+ if ( pC0->fUseless > pC1->fUseless )
+ return 1;
if ( pC0->Area < pC1->Area - p->fEpsilon )
return -1;
if ( pC0->Area > pC1->Area + p->fEpsilon )
@@ -1129,8 +1141,8 @@ float If_CutAreaRefed( If_Man_t * p, If_Cut_t * pCut )
return 0;
aResult2 = If_CutAreaDeref( p, pCut );
aResult = If_CutAreaRef( p, pCut );
- assert( aResult > aResult2 - p->fEpsilon );
- assert( aResult < aResult2 + p->fEpsilon );
+// assert( aResult > aResult2 - p->fEpsilon );
+// assert( aResult < aResult2 + p->fEpsilon );
return aResult;
}
@@ -1207,8 +1219,8 @@ float If_CutEdgeDerefed( If_Man_t * p, If_Cut_t * pCut )
return pCut->nLeaves;
aResult2 = If_CutEdgeRef( p, pCut );
aResult = If_CutEdgeDeref( p, pCut );
- assert( aResult > aResult2 - 3*p->fEpsilon );
- assert( aResult < aResult2 + 3*p->fEpsilon );
+// assert( aResult > aResult2 - 3*p->fEpsilon );
+// assert( aResult < aResult2 + 3*p->fEpsilon );
return aResult;
}
@@ -1230,8 +1242,8 @@ float If_CutEdgeRefed( If_Man_t * p, If_Cut_t * pCut )
return pCut->nLeaves;
aResult2 = If_CutEdgeDeref( p, pCut );
aResult = If_CutEdgeRef( p, pCut );
- assert( aResult > aResult2 - p->fEpsilon );
- assert( aResult < aResult2 + p->fEpsilon );
+// assert( aResult > aResult2 - p->fEpsilon );
+// assert( aResult < aResult2 + p->fEpsilon );
return aResult;
}
diff --git a/src/map/if/ifMap.c b/src/map/if/ifMap.c
index bd8ebed7..f234d354 100644
--- a/src/map/if/ifMap.c
+++ b/src/map/if/ifMap.c
@@ -225,7 +225,7 @@ void If_ObjPerformMappingAnd( If_Man_t * p, If_Obj_t * pObj, int Mode, int fPrep
if ( p->pPars->fPower )
pCut->Power = (Mode == 2)? If_CutPowerDerefed( p, pCut, pObj ) : If_CutPowerFlow( p, pCut, pObj );
// save the best cut from the previous iteration
- if ( !fPreprocess )
+ if ( !fPreprocess || pCut->nLeaves <= 1 )
If_CutCopy( p, pCutSet->ppCuts[pCutSet->nCuts++], pCut );
}
@@ -516,7 +516,8 @@ void If_ObjPerformMappingChoice( If_Man_t * p, If_Obj_t * pObj, int Mode, int fP
// remove elementary cuts
for ( pTemp = pObj; pTemp; pTemp = pTemp->pEquiv )
- pTemp->pCutSet->nCuts--;
+ if ( pTemp != pObj || pTemp->pCutSet->nCuts > 1 )
+ pTemp->pCutSet->nCuts--;
// update the cutset of the node
pCutSet = pObj->pCutSet;
diff --git a/src/map/if/ifTruth.c b/src/map/if/ifTruth.c
index 83c40952..ae4bcea4 100644
--- a/src/map/if/ifTruth.c
+++ b/src/map/if/ifTruth.c
@@ -20,6 +20,7 @@
#include "if.h"
#include "bool/kit/kit.h"
+#include "misc/extra/extra.h"
ABC_NAMESPACE_IMPL_START
diff --git a/src/map/mio/mio.c b/src/map/mio/mio.c
index 8648a604..3010bbd3 100644
--- a/src/map/mio/mio.c
+++ b/src/map/mio/mio.c
@@ -408,6 +408,7 @@ int Mio_CommandWriteGenlib( Abc_Frame_t * pAbc, int argc, char **argv )
FILE * pOut, * pErr, * pFile;
char * pFileName;
int fSelected = 0;
+ int fVerilog = 0;
int fVerbose = 0;
int c;
@@ -415,16 +416,19 @@ int Mio_CommandWriteGenlib( Abc_Frame_t * pAbc, int argc, char **argv )
pErr = Abc_FrameReadErr(pAbc);
Extra_UtilGetoptReset();
- while ( (c = Extra_UtilGetopt(argc, argv, "vah")) != EOF )
+ while ( (c = Extra_UtilGetopt(argc, argv, "agvh")) != EOF )
{
switch (c)
{
- case 'v':
- fVerbose ^= 1;
- break;
case 'a':
fSelected ^= 1;
break;
+ case 'g':
+ fVerilog ^= 1;
+ break;
+ case 'v':
+ fVerbose ^= 1;
+ break;
case 'h':
goto usage;
break;
@@ -450,16 +454,20 @@ int Mio_CommandWriteGenlib( Abc_Frame_t * pAbc, int argc, char **argv )
printf( "Error! Cannot open file \"%s\" for writing the library.\n", pFileName );
return 1;
}
- Mio_WriteLibrary( pFile, (Mio_Library_t *)Abc_FrameReadLibGen(), 0, 0, fSelected );
+ if ( fVerilog )
+ Mio_WriteLibraryVerilog( pFile, (Mio_Library_t *)Abc_FrameReadLibGen(), 0, 0, fSelected );
+ else
+ Mio_WriteLibrary( pFile, (Mio_Library_t *)Abc_FrameReadLibGen(), 0, 0, fSelected );
fclose( pFile );
printf( "The current genlib library is written into file \"%s\".\n", pFileName );
return 0;
usage:
- fprintf( pErr, "\nusage: write_genlib [-vah] <file>\n");
+ fprintf( pErr, "\nusage: write_genlib [-agvh] <file>\n");
fprintf( pErr, "\t writes the current genlib library into a file\n" );
- fprintf( pErr, "\t-v : toggles enabling of verbose output [default = %s]\n", fVerbose? "yes" : "no" );
fprintf( pErr, "\t-a : toggles writing min-area gates [default = %s]\n", fSelected? "yes" : "no" );
+ fprintf( pErr, "\t-g : toggles writing the library in Verilog [default = %s]\n", fVerilog? "yes" : "no" );
+ fprintf( pErr, "\t-v : toggles enabling of verbose output [default = %s]\n", fVerbose? "yes" : "no" );
fprintf( pErr, "\t-h : print the command usage\n");
fprintf( pErr, "\t<file> : optional file name to write the library\n");
return 1;
diff --git a/src/map/mio/mio.h b/src/map/mio/mio.h
index d7f52f8c..18e3b92b 100644
--- a/src/map/mio/mio.h
+++ b/src/map/mio/mio.h
@@ -194,6 +194,7 @@ extern void Mio_GateDelete( Mio_Gate_t * pGate );
extern void Mio_PinDelete( Mio_Pin_t * pPin );
extern Mio_Pin_t * Mio_PinDup( Mio_Pin_t * pPin );
extern void Mio_WriteLibrary( FILE * pFile, Mio_Library_t * pLib, int fPrintSops, int fShort, int fSelected );
+extern void Mio_WriteLibraryVerilog( FILE * pFile, Mio_Library_t * pLib, int fPrintSops, int fShort, int fSelected );
extern Mio_Gate_t ** Mio_CollectRoots( Mio_Library_t * pLib, int nInputs, float tDelay, int fSkipInv, int * pnGates, int fVerbose );
extern Mio_Cell_t * Mio_CollectRootsNew( Mio_Library_t * pLib, int nInputs, int * pnGates, int fVerbose );
extern Mio_Cell_t * Mio_CollectRootsNewDefault( int nInputs, int * pnGates, int fVerbose );
diff --git a/src/map/mio/mioUtils.c b/src/map/mio/mioUtils.c
index 9cd44cba..c7180e1c 100644
--- a/src/map/mio/mioUtils.c
+++ b/src/map/mio/mioUtils.c
@@ -288,6 +288,99 @@ void Mio_WriteLibrary( FILE * pFile, Mio_Library_t * pLib, int fPrintSops, int f
/**Function*************************************************************
+ Synopsis []
+
+ Description []
+
+ SideEffects []
+
+ SeeAlso []
+
+***********************************************************************/
+void Exp_PrintNodeVerilog( FILE * pFile, int nVars, Vec_Int_t * p, Vec_Ptr_t * vNames, int Node, int fCompl )
+{
+ extern void Exp_PrintLitVerilog( FILE * pFile, int nVars, Vec_Int_t * p, Vec_Ptr_t * vNames, int Lit );
+ if ( Vec_IntEntry(p, 2*Node+1) >= 2*nVars )
+ fprintf( pFile, "(" );
+ Exp_PrintLitVerilog( pFile, nVars, p, vNames, Vec_IntEntry(p, 2*Node+1) ^ fCompl );
+ if ( Vec_IntEntry(p, 2*Node+1) >= 2*nVars )
+ fprintf( pFile, ")" );
+ fprintf( pFile, " %c ", fCompl ? '|' : '&' );
+ if ( Vec_IntEntry(p, 2*Node+0) >= 2*nVars )
+ fprintf( pFile, "(" );
+ Exp_PrintLitVerilog( pFile, nVars, p, vNames, Vec_IntEntry(p, 2*Node+0) ^ fCompl );
+ if ( Vec_IntEntry(p, 2*Node+0) >= 2*nVars )
+ fprintf( pFile, ")" );
+}
+void Exp_PrintLitVerilog( FILE * pFile, int nVars, Vec_Int_t * p, Vec_Ptr_t * vNames, int Lit )
+{
+ if ( Lit == EXP_CONST0 )
+ fprintf( pFile, "1\'b0" );
+ else if ( Lit == EXP_CONST1 )
+ fprintf( pFile, "1\'b1" );
+ else if ( Lit < 2 * nVars )
+ fprintf( pFile, "%s%s", (Lit&1) ? "~" : "", (char *)Vec_PtrEntry(vNames, Lit/2) );
+ else
+ Exp_PrintNodeVerilog( pFile, nVars, p, vNames, Lit/2-nVars, Lit&1 );
+}
+void Exp_PrintVerilog( FILE * pFile, int nVars, Vec_Int_t * p, Vec_Ptr_t * vNames )
+{
+ Exp_PrintLitVerilog( pFile, nVars, p, vNames, Vec_IntEntryLast(p) );
+}
+void Mio_WriteGateVerilog( FILE * pFile, Mio_Gate_t * pGate, Vec_Ptr_t * vNames )
+{
+ char * pName; int i;
+ fprintf( pFile, "module %s ( ", pGate->pName );
+ fprintf( pFile, "%s", pGate->pOutName );
+ Vec_PtrForEachEntry( char *, vNames, pName, i )
+ fprintf( pFile, ", %s", pName );
+ fprintf( pFile, " );\n" );
+ fprintf( pFile, " output %s;\n", pGate->pOutName );
+ if ( Vec_PtrSize(vNames) > 0 )
+ {
+ fprintf( pFile, " input %s", (char *)Vec_PtrEntry(vNames, 0) );
+ Vec_PtrForEachEntryStart( char *, vNames, pName, i, 1 )
+ fprintf( pFile, ", %s", pName );
+ fprintf( pFile, ";\n" );
+ }
+ fprintf( pFile, " assign %s = ", pGate->pOutName );
+ Exp_PrintVerilog( pFile, Vec_PtrSize(vNames), pGate->vExpr, vNames );
+ fprintf( pFile, ";\n" );
+ fprintf( pFile, "endmodule\n\n" );
+}
+void Mio_WriteLibraryVerilog( FILE * pFile, Mio_Library_t * pLib, int fPrintSops, int fShort, int fSelected )
+{
+ Mio_Gate_t * pGate;
+ Mio_Pin_t * pPin;
+ Vec_Ptr_t * vGates = Vec_PtrAlloc( 1000 );
+ Vec_Ptr_t * vNames = Vec_PtrAlloc( 100 );
+ int i, nCells;
+ if ( fSelected )
+ {
+ Mio_Cell2_t * pCells = Mio_CollectRootsNewDefault2( 6, &nCells, 0 );
+ for ( i = 0; i < nCells; i++ )
+ Vec_PtrPush( vGates, pCells[i].pMioGate );
+ ABC_FREE( pCells );
+ }
+ else
+ {
+ for ( i = 0; i < pLib->nGates; i++ )
+ Vec_PtrPush( vGates, pLib->ppGates0[i] );
+ }
+ fprintf( pFile, "// Verilog for genlib library \"%s\" with %d gates written by ABC on %s\n\n", pLib->pName, Vec_PtrSize(vGates), Extra_TimeStamp() );
+ Vec_PtrForEachEntry( Mio_Gate_t *, vGates, pGate, i )
+ {
+ Vec_PtrClear( vNames );
+ Mio_GateForEachPin( pGate, pPin )
+ Vec_PtrPush( vNames, pPin->pName );
+ Mio_WriteGateVerilog( pFile, pGate, vNames );
+ }
+ Vec_PtrFree( vNames );
+ Vec_PtrFree( vGates );
+}
+
+/**Function*************************************************************
+
Synopsis [Compares the max delay of two gates.]
Description []
diff --git a/src/map/scl/scl.c b/src/map/scl/scl.c
index 27342458..635ec19e 100644
--- a/src/map/scl/scl.c
+++ b/src/map/scl/scl.c
@@ -153,11 +153,12 @@ int Scl_CommandReadLib( Abc_Frame_t * pAbc, int argc, char ** argv )
float Gain = 0;
int nGatesMin = 0;
int fShortNames = 0;
+ int fUnit = 0;
int fVerbose = 1;
int fVeryVerbose = 0;
Extra_UtilGetoptReset();
- while ( ( c = Extra_UtilGetopt( argc, argv, "SGMdnvwh" ) ) != EOF )
+ while ( ( c = Extra_UtilGetopt( argc, argv, "SGMdnuvwh" ) ) != EOF )
{
switch ( c )
{
@@ -200,6 +201,9 @@ int Scl_CommandReadLib( Abc_Frame_t * pAbc, int argc, char ** argv )
case 'n':
fShortNames ^= 1;
break;
+ case 'u':
+ fUnit ^= 1;
+ break;
case 'v':
fVerbose ^= 1;
break;
@@ -242,6 +246,12 @@ int Scl_CommandReadLib( Abc_Frame_t * pAbc, int argc, char ** argv )
// dump the resulting library
if ( fDump && pAbc->pLibScl )
Abc_SclWriteLiberty( Extra_FileNameGenericAppend(pFileName, "_temp.lib"), (SC_Lib *)pAbc->pLibScl );
+ if ( fUnit )
+ {
+ SC_Cell * pCell; int i;
+ SC_LibForEachCell( pLib, pCell, i )
+ pCell->area = 1;
+ }
// extract genlib library
if ( pAbc->pLibScl )
{
@@ -251,13 +261,14 @@ int Scl_CommandReadLib( Abc_Frame_t * pAbc, int argc, char ** argv )
return 0;
usage:
- fprintf( pAbc->Err, "usage: read_lib [-SG float] [-M num] [-dnvwh] <file>\n" );
+ fprintf( pAbc->Err, "usage: read_lib [-SG float] [-M num] [-dnuvwh] <file>\n" );
fprintf( pAbc->Err, "\t reads Liberty library from file\n" );
fprintf( pAbc->Err, "\t-S float : the slew parameter used to generate the library [default = %.2f]\n", Slew );
fprintf( pAbc->Err, "\t-G float : the gain parameter used to generate the library [default = %.2f]\n", Gain );
fprintf( pAbc->Err, "\t-M num : skip gate classes whose size is less than this [default = %d]\n", nGatesMin );
fprintf( pAbc->Err, "\t-d : toggle dumping the parsed library into file \"*_temp.lib\" [default = %s]\n", fDump? "yes": "no" );
fprintf( pAbc->Err, "\t-n : toggle replacing gate/pin names by short strings [default = %s]\n", fShortNames? "yes": "no" );
+ fprintf( pAbc->Err, "\t-u : toggle setting unit area for all cells [default = %s]\n", fUnit? "yes": "no" );
fprintf( pAbc->Err, "\t-v : toggle writing verbose information [default = %s]\n", fVerbose? "yes": "no" );
fprintf( pAbc->Err, "\t-w : toggle writing information about skipped gates [default = %s]\n", fVeryVerbose? "yes": "no" );
fprintf( pAbc->Err, "\t-h : prints the command summary\n" );
diff --git a/src/map/scl/sclBufSize.c b/src/map/scl/sclBufSize.c
index be9cc3bd..4d438af0 100644
--- a/src/map/scl/sclBufSize.c
+++ b/src/map/scl/sclBufSize.c
@@ -435,7 +435,7 @@ void Abc_SclBufSize( Bus_Man_t * p, float Gain )
// add one or more inverters
// Abc_NtkPrintFanoutProfile( pObj );
Abc_NodeCollectFanouts( pObj, p->vFanouts );
- Vec_PtrSort( p->vFanouts, (int(*)(void))Bus_SclCompareFanouts );
+ Vec_PtrSort( p->vFanouts, (int(*)(const void *, const void *))Bus_SclCompareFanouts );
do
{
Abc_Obj_t * pInv;
diff --git a/src/map/scl/sclBuffer.c b/src/map/scl/sclBuffer.c
index 97f5f095..8417b317 100644
--- a/src/map/scl/sclBuffer.c
+++ b/src/map/scl/sclBuffer.c
@@ -371,7 +371,7 @@ Abc_Obj_t * Abc_SclPerformBufferingOne( Abc_Obj_t * pObj, int Degree, int fUseIn
// collect fanouts and sort by reverse level
vFanouts = Vec_PtrAlloc( Abc_ObjFanoutNum(pObj) );
Abc_NodeCollectFanouts( pObj, vFanouts );
- Vec_PtrSort( vFanouts, (int (*)(void))Abc_NodeCompareLevels );
+ Vec_PtrSort( vFanouts, (int (*)(const void *, const void *))Abc_NodeCompareLevels );
// select the first Degree fanouts
if ( fUseInvs )
pBuffer = Abc_NtkCreateNodeInv( pObj->pNtk, NULL );