iCE40/abc - [no description]

	Commit message (Expand)	Author	Age	Files	Lines
*	Integrated buffering and sizing.	Alan Mishchenko	2013-08-08	12	-99/+683
*	Improvements to buffering and sizing.	Alan Mishchenko	2013-08-07	2	-172/+159
*	Improvements to buffering and sizing.	Alan Mishchenko	2013-08-06	8	-36/+502
*	Improvements to buffering and sizing.	Alan Mishchenko	2013-08-06	4	-18/+288
*	Adding new (un)buffering with phase information.	Alan Mishchenko	2013-08-05	1	-5/+30
*	Adding new (un)buffering with phase information.	Alan Mishchenko	2013-08-05	3	-9/+107
*	Adding code to estimate buffer trees.	Alan Mishchenko	2013-08-05	7	-43/+249
*	Change from input slew to input drive strength in the BLIF file.	Alan Mishchenko	2013-08-04	5	-10/+81
*	Adding switch 'buffer -p' to enable buffing of the primary inputs.	Alan Mishchenko	2013-08-02	3	-9/+16
*	Internal parameter tuning.	Alan Mishchenko	2013-07-31	1	-1/+1
*	Parametrizing standard-cell mapper to account for the fanout delay.	Alan Mishchenko	2013-07-30	5	-10/+47
*	Added commands 'maxsize' and 'unbuffer'.	Alan Mishchenko	2013-07-29	1	-3/+8
*	Added commands 'maxsize' and 'unbuffer'.	Alan Mishchenko	2013-07-29	3	-8/+192
*	Compiler warning.	Alan Mishchenko	2013-07-29	1	-1/+1
*	Improved buffering.	Alan Mishchenko	2013-07-29	8	-333/+334
*	Improved gate-sizing.	Alan Mishchenko	2013-07-29	7	-3/+600
*	Tuning standard-cell mapping flow.	Alan Mishchenko	2013-07-24	9	-65/+112
*	Tuning standard-cell mapping flow.	Alan Mishchenko	2013-07-23	2	-4/+5
*	Tuning standard-cell mapping flow.	Alan Mishchenko	2013-07-23	1	-1/+1
*	Tuning standard-cell mapping flow.	Alan Mishchenko	2013-07-23	6	-171/+246
*	Bug fix and warning print.	Alan Mishchenko	2013-07-22	2	-2/+5
*	Generating GENLIB library from SCL.	Alan Mishchenko	2013-07-22	8	-185/+470
*	Restructuring gate-sizing code trying to separate timing analysis.	Alan Mishchenko	2013-07-21	13	-298/+580
*	New technology mapper.	Alan Mishchenko	2013-07-21	6	-20/+25
*	Improvements to post-mapping re-sizing.	Alan Mishchenko	2013-07-21	7	-131/+159
*	Adding support for input slew and output capacitance to timer and gate-sizer.	Alan Mishchenko	2013-07-21	4	-3/+97
*	Improvements to the SCL package.	Alan Mishchenko	2013-07-20	6	-159/+52
*	Added command 'dnsize' to complement command 'upsize'.	Alan Mishchenko	2013-07-20	8	-31/+730
*	Small changes to the printout in timing analysis.	Alan Mishchenko	2013-07-19	3	-3/+5
*	Temprary changes.	Alan Mishchenko	2013-07-18	1	-1/+50
*	New technology mapper.	Alan Mishchenko	2013-07-18	1	-1/+1
*	New technology mapper.	Alan Mishchenko	2013-07-18	3	-53/+32
*	Temprary changes.	Alan Mishchenko	2013-07-18	1	-0/+49
*	New technology mapper.	Alan Mishchenko	2013-07-18	4	-82/+41
*	New technology mapper.	Alan Mishchenko	2013-07-18	3	-46/+93
*	New technology mapper.	Alan Mishchenko	2013-07-17	5	-24/+46
*	New technology mapper.	Alan Mishchenko	2013-07-17	1	-1/+1
*	New technology mapper.	Alan Mishchenko	2013-07-17	1	-1/+1
*	New technology mapper.	Alan Mishchenko	2013-07-17	8	-25/+356
*	Commenting out assertion related to choices in 'if'.	Alan Mishchenko	2013-07-16	1	-1/+1
*	New technology mapper.	Alan Mishchenko	2013-07-15	6	-19/+15
*	New technology mapper.	Alan Mishchenko	2013-07-14	3	-4/+10
*	New technology mapper.	Alan Mishchenko	2013-07-14	6	-216/+225
*	New technology mapper.	Alan Mishchenko	2013-07-14	9	-694/+934
*	New technology mapper.	Alan Mishchenko	2013-07-13	9	-106/+1086
*	New technology mapper.	Alan Mishchenko	2013-07-13	7	-9/+79
*	New technology mapper.	Alan Mishchenko	2013-07-13	1	-1/+1
*	New technology mapper.	Alan Mishchenko	2013-07-13	4	-66/+71
*	New technology mapper.	Alan Mishchenko	2013-07-13	1	-0/+1
*	New technology mapper.	Alan Mishchenko	2013-07-13	1	-2/+2