diff options
| author | Nikolai Artemiev <nartemiev@google.com> | 2021-05-08 17:31:23 +1000 |
|---|---|---|
| committer | Angel Pons <th3fanbus@gmail.com> | 2021-06-10 10:36:22 +0000 |
| commit | 91254c5bca32c6c2ece8062047f6f3d0953a7113 (patch) | |
| tree | e212d368246627ef8bfa9f8380b9b8dbaaaffa00 | |
| parent | f41d24823c1703e328fc27588bbcf3c96eecdbc9 (diff) | |
| download | flashrom-91254c5bca32c6c2ece8062047f6f3d0953a7113.tar.gz flashrom-91254c5bca32c6c2ece8062047f6f3d0953a7113.tar.bz2 flashrom-91254c5bca32c6c2ece8062047f6f3d0953a7113.zip | |
flashchips.c: add support for W25Q32JW...M
The chip was added to cros flashrom in
`commit 1fc77dd1ee27a5d6e58a82c6ed6ed390a15372d7`.
Quoting from the commit message:
> We have varied the correct chip name is reported as well as
> write and read 16MBytes of random data and verified the checksum's match.
> Further, --wp-list appears to report the correct ranges.
>
> BUG=b:130199963
> BRANCH=none
> TEST=Ran flashrom with a Dediprog SF100, RW random data and checksum matched.
Change-Id: I7425e12658dd69c4ec8d3309dd591d09a935bb4d
Signed-off-by: Nikolai Artemiev <nartemiev@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/53946
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
| -rw-r--r-- | flashchips.c | 38 | ||||
| -rw-r--r-- | flashchips.h | 1 |
2 files changed, 39 insertions, 0 deletions
diff --git a/flashchips.c b/flashchips.c index 007bcc9c..1b281aa1 100644 --- a/flashchips.c +++ b/flashchips.c @@ -17580,6 +17580,44 @@ const struct flashchip flashchips[] = { { .vendor = "Winbond", + .name = "W25Q32JW...M", + .bustype = BUS_SPI, + .manufacture_id = WINBOND_NEX_ID, + .model_id = WINBOND_NEX_W25Q32JW_M, + .total_size = 4096, + .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, + .tested = TEST_OK_PREW, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 1024} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {32 * 1024, 128} }, + .block_erase = spi_block_erase_52, + }, { + .eraseblocks = { {64 * 1024, 64} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {4 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { {4 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .printlock = spi_prettyprint_status_register_bp2_tb_bpl, + .unlock = spi_disable_blockprotect_bp2_srwd, + .write = spi_chip_write_256, + .read = spi_chip_read, + .voltage = {1700, 1950}, + }, + + { + .vendor = "Winbond", .name = "W25Q40.V", .bustype = BUS_SPI, .manufacture_id = WINBOND_NEX_ID, diff --git a/flashchips.h b/flashchips.h index b6b75c85..4bbaef12 100644 --- a/flashchips.h +++ b/flashchips.h @@ -977,6 +977,7 @@ #define WINBOND_NEX_W25Q256_W 0x6019 /* W25Q256JW */ #define WINBOND_NEX_W25Q128_V_M 0x7018 /* W25Q128JVSM */ #define WINBOND_NEX_W25Q256JV_M 0x7019 /* W25Q256JV_M (QE=0) */ +#define WINBOND_NEX_W25Q32JW_M 0x8016 /* W25Q32JW...M */ #define WINBOND_NEX_W25Q64JW 0x8017 #define WINBOND_NEX_W25Q128_DTR 0x8018 /* W25Q128JW_DTR */ #define WINBOND_NEX_W25Q256_DTR 0x8019 /* W25Q256JW_DTR aka W25Q256256JW-IM */ |