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authorElyes HAOUAS <ehaouas@noos.fr>2018-03-27 12:15:09 +0200
committerNico Huber <nico.h@gmx.de>2018-04-24 20:18:58 +0000
commit124ef38f7afc61ad7c713c22aad7c5c7f79bdb9b (patch)
tree980f498681fcc053ec1e591e22bb16afbef0a191 /board_enable.c
parent3f7e3419887c6d37330387f8e32c86ba47bdf70c (diff)
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Fix whitespace errors
Change-Id: Ic2d3bb9d8581a0471a8568a130f893b34dddf113 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/25380 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'board_enable.c')
-rw-r--r--board_enable.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/board_enable.c b/board_enable.c
index 182a4551..a3e45150 100644
--- a/board_enable.c
+++ b/board_enable.c
@@ -159,7 +159,7 @@ struct winbond_mux {
struct winbond_port {
const struct winbond_mux *mux; /* NULL or pointer to mux info for the 8 bits */
uint8_t ldn; /* LDN this GPIO register is located in */
- uint8_t enable_bit; /* bit in 0x30 of that LDN to enable
+ uint8_t enable_bit; /* bit in 0x30 of that LDN to enable
the GPIO port */
uint8_t base; /* base register in that LDN for the port */
};
@@ -547,8 +547,8 @@ void w83697xx_memw_enable(uint16_t port)
}
} else {
msg_pinfo("BIOS ROM is disabled\n");
- }
- w836xx_ext_leave(port);
+ }
+ w836xx_ext_leave(port);
}
/*
@@ -1036,7 +1036,7 @@ static int nvidia_mcp_gpio_set(int gpio, int raise)
case 0x0364: /* MCP55 */
/* find SMBus controller on *this* southbridge */
/* The infamous Tyan S2915-E has two south bridges; they are
- easily told apart from each other by the class of the
+ easily told apart from each other by the class of the
LPC bridge, but have the same SMBus bridge IDs */
if (dev->func != 0) {
msg_perr("MCP LPC bridge at unexpected function"