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| author | Angel Pons <th3fanbus@gmail.com> | 2019-12-18 00:26:15 +0100 |
|---|---|---|
| committer | Nico Huber <nico.h@gmx.de> | 2019-12-21 11:47:21 +0000 |
| commit | 728062f7ff7c2dca31bc99fe45eb5cacd7cf2d53 (patch) | |
| tree | 8df82988b92b7b091358e72570671d908016a08a /chipset_enable.c | |
| parent | a9d6d1a817ce20e834fe7c354629976e3e5f1108 (diff) | |
| download | flashrom-728062f7ff7c2dca31bc99fe45eb5cacd7cf2d53.tar.gz flashrom-728062f7ff7c2dca31bc99fe45eb5cacd7cf2d53.tar.bz2 flashrom-728062f7ff7c2dca31bc99fe45eb5cacd7cf2d53.zip | |
chipset_enable.c: Mark Intel HM76 as DEP
Tested reading, writing and erasing the internal flash chip using a
Samsung NP530U3C laptop with an Intel HM76 PCH. However, since all
ME-enabled chipsets are marked as DEP instead of OK, this one shall
follow suit as well.
Change-Id: I1097c5fcf782e7ecf52f05c571ad188456307d00
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/37803
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Diffstat (limited to 'chipset_enable.c')
| -rw-r--r-- | chipset_enable.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/chipset_enable.c b/chipset_enable.c index b55852ca..e826d900 100644 --- a/chipset_enable.c +++ b/chipset_enable.c @@ -1831,7 +1831,7 @@ const struct penable chipset_enables[] = { {0x8086, 0x1e56, B_FS, DEP, "Intel", "QS77", enable_flash_pch7}, {0x8086, 0x1e57, B_FS, DEP, "Intel", "HM77", enable_flash_pch7}, {0x8086, 0x1e58, B_FS, NT, "Intel", "UM77", enable_flash_pch7}, - {0x8086, 0x1e59, B_FS, NT, "Intel", "HM76", enable_flash_pch7}, + {0x8086, 0x1e59, B_FS, DEP, "Intel", "HM76", enable_flash_pch7}, {0x8086, 0x1e5d, B_FS, NT, "Intel", "HM75", enable_flash_pch7}, {0x8086, 0x1e5e, B_FS, NT, "Intel", "HM70", enable_flash_pch7}, {0x8086, 0x1e5f, B_FS, DEP, "Intel", "NM70", enable_flash_pch7}, |