diff options
| author | Angel Pons <th3fanbus@gmail.com> | 2018-09-30 19:39:41 +0200 |
|---|---|---|
| committer | Nico Huber <nico.h@gmx.de> | 2018-10-03 11:50:51 +0000 |
| commit | c4d3efbffdf22367c71ec712c828969aafadab54 (patch) | |
| tree | 5d58335b26f0643e815664fe7eda48ff47c0ae01 /chipset_enable.c | |
| parent | 3130cbd89b14bf29da32a9c151a4a633fb023e54 (diff) | |
| download | flashrom-c4d3efbffdf22367c71ec712c828969aafadab54.tar.gz flashrom-c4d3efbffdf22367c71ec712c828969aafadab54.tar.bz2 flashrom-c4d3efbffdf22367c71ec712c828969aafadab54.zip | |
chipset_enable.c: Mark Broadwell U Premium as DEP
As per Laurent Grimaud on the mailing list. I also have said chipset.
Since all ME-enable chipsets are marked as DEP instead of OK, this
one shall follow suit as well.
Change-Id: Ie195e8ec9ea1a2393e31bebdaede4fd3c3301a17
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/28817
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'chipset_enable.c')
| -rw-r--r-- | chipset_enable.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/chipset_enable.c b/chipset_enable.c index 566b1fb0..4b28924e 100644 --- a/chipset_enable.c +++ b/chipset_enable.c @@ -1896,7 +1896,7 @@ const struct penable chipset_enables[] = { {0x8086, 0x9c47, NT, "Intel", "Lynx Point LP Value", enable_flash_pch8_lp}, {0x8086, 0x9cc1, NT, "Intel", "Haswell U Sample", enable_flash_pch9_lp}, {0x8086, 0x9cc2, NT, "Intel", "Broadwell U Sample", enable_flash_pch9_lp}, - {0x8086, 0x9cc3, NT, "Intel", "Broadwell U Premium", enable_flash_pch9_lp}, + {0x8086, 0x9cc3, DEP, "Intel", "Broadwell U Premium", enable_flash_pch9_lp}, {0x8086, 0x9cc5, NT, "Intel", "Broadwell U Base", enable_flash_pch9_lp}, {0x8086, 0x9cc6, NT, "Intel", "Broadwell Y Sample", enable_flash_pch9_lp}, {0x8086, 0x9cc7, NT, "Intel", "Broadwell Y Premium", enable_flash_pch9_lp}, |