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author | Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> | 2008-11-18 00:43:14 +0000 |
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committer | Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> | 2008-11-18 00:43:14 +0000 |
commit | 738fdffe4079f72e2ebd10d7d8d94f526bd86e1f (patch) | |
tree | 2b702013808150a8829f47becd5e61e4a569400b /coreboot_tables.h | |
parent | 598ec58e045715e75f43b8f13732caf8cd5193e3 (diff) | |
download | flashrom-738fdffe4079f72e2ebd10d7d8d94f526bd86e1f.tar.gz flashrom-738fdffe4079f72e2ebd10d7d8d94f526bd86e1f.tar.bz2 flashrom-738fdffe4079f72e2ebd10d7d8d94f526bd86e1f.zip |
ichspi: use spi_nbyte_read() instead of running the opcode directly
Currently flashrom assumes every vendor BIOS shares our view about which
SPI opcodes should be placed in which location.
Move to a less optimistic implementation and actually use the generic
SPI read functions. They're useful for abstracting exactly this stuff
and that makes them the preferred choice.
Corresponding to flashrom svn r346 and coreboot v2 svn r3758.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
Diffstat (limited to 'coreboot_tables.h')
0 files changed, 0 insertions, 0 deletions