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author | Michael Niewöhner <foss@mniewoehner.de> | 2021-09-21 20:15:32 +0200 |
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committer | Nico Huber <nico.h@gmx.de> | 2021-10-04 10:53:03 +0000 |
commit | 7b9c74f49607dda18243138e87d71b773cec7a7b (patch) | |
tree | 27ae4513866c11f1b9e76ff9344a15427e810bcb /coreboot_tables.h | |
parent | 106f097ef66ad6c02d5efb58dd778dbece02667e (diff) | |
download | flashrom-7b9c74f49607dda18243138e87d71b773cec7a7b.tar.gz flashrom-7b9c74f49607dda18243138e87d71b773cec7a7b.tar.bz2 flashrom-7b9c74f49607dda18243138e87d71b773cec7a7b.zip |
ft2232_spi: reintroduce generic GPIOL control
This reintroduces a reworked version of the GPIOL pin control first
introduced in commit 3207844 (CB:49637), which was reverted in commit
6518cf3 (CB:55692) due to breakage.
This change introduces a new argument `gpiolX` to allow use of the four
GPIOL pins either as generic gpios or as additional CS# signal(s). `X`
specifies the GPIOL pin (0-3) to be set to one of [HLC] with the
following meaning:
* H - set the pin as output high
* L - set the pin as output low
* C - use the pin as additional CS# signal
The third value, `C`, aims to replace the parameter `csgpiol`, that is
now marked as deprecated and can be removed at some point in the future.
`gpiol` and `csgpiol` are mutually exclusive and use of both results in
an error.
Multiple pins may be set by specifying the parameter multiple times.
Documentation was updated/added accordingly.
Test: All pin levels/modes have been verified to behave correctly with a
logic analyzer.
Change-Id: I3989f0f9596c090de52dca67183b1363dae59d3a
Signed-off-by: Alan Green <avg@google.com>
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/57810
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'coreboot_tables.h')
0 files changed, 0 insertions, 0 deletions