diff options
author | Aarya Chaumal <aarya.chaumal@gmail.com> | 2022-06-04 01:34:44 +0530 |
---|---|---|
committer | Thomas Heijligen <src@posteo.de> | 2022-06-20 10:34:43 +0000 |
commit | 7db2baa77d41c3a74449a3f2b907025f69b776b9 (patch) | |
tree | a98c3e4250cef520b30300536e0138ff5fefe1a5 /digilent_spi.c | |
parent | aa64c054d0b0ac842ad8ac966f7ad57afc41f3c1 (diff) | |
download | flashrom-7db2baa77d41c3a74449a3f2b907025f69b776b9.tar.gz flashrom-7db2baa77d41c3a74449a3f2b907025f69b776b9.tar.bz2 flashrom-7db2baa77d41c3a74449a3f2b907025f69b776b9.zip |
flashrom.c, flashcips.c: Test the order of erase functions
Add a check so that the erase functions for all flashchips are in
increasing order of their respective eraseblock sizes. This is required
for the implentation of the improved erasing algorithm. The patch uses
the count of eraseblocks in each erase function to determine the order
(More eraseblocks means that the function has smaller eraseblock size).
Also fix the structs in flashchips.c which were found to be not
conforming to this test.
TEST = make && ./flashrom
Change-Id: I137cb40483fa690ecc6c7eaece2d9d3f7a851bb4
Signed-off-by: Aarya Chaumal <aarya.chaumal@gmail.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/64961
Reviewed-by: Thomas Heijligen <src@posteo.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'digilent_spi.c')
0 files changed, 0 insertions, 0 deletions