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author | Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> | 2010-07-27 22:03:46 +0000 |
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committer | Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> | 2010-07-27 22:03:46 +0000 |
commit | 1d3a2fefbc636fb569bd1d018fb97b1b17c08e99 (patch) | |
tree | a384be3a9c9c890870117baf435a0312ecfd4a78 /flash.h | |
parent | 695fb5d0ac60c399fac4bac8595bfb8a0efdb30f (diff) | |
download | flashrom-1d3a2fefbc636fb569bd1d018fb97b1b17c08e99.tar.gz flashrom-1d3a2fefbc636fb569bd1d018fb97b1b17c08e99.tar.bz2 flashrom-1d3a2fefbc636fb569bd1d018fb97b1b17c08e99.zip |
Convert MMIO accesses of non-internal PCI-based programmers to be endian-agnostic
Convert all PCI-based external programmers to use special little-endian
accessors for all MMIO regions of PCI devices. This patch does _not_
touch the internal programmer (which is PCI-based as well).
Huge thanks go to Misha Manulis who worked with me to create a first
version of this patch for the satasii programmer based on modification
of generic code.
Huge thanks also go to Segher Boessenkool for suggesting the pci_mmio_
prefix for the abstraction layer.
NOTE to package maintainers: With this patch, compilation and usage of
flashrom should be safe on x86, x86_64, MIPS (little and big endian) and
PowerPC (big endian).
The internal programmer is disabled on non-x86/x86_64 (but it
compiles). The atahpt, nic3com, nicnatsemi, nicrealtek and rayer_spi
can not be compiled on non-x86/x86_64 because port space I/O is
not (yet) supported. Please compile with default settings on
x86/x86_64 and with the following settings on all other architectures:
make CONFIG_NIC3COM=no CONFIG_NICREALTEK=no CONFIG_NICNATSEMI=no
CONFIG_RAYER_SPI=no
Corresponding to flashrom svn r1111.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Misha Manulis <misha@manulis.com>
Diffstat (limited to 'flash.h')
-rw-r--r-- | flash.h | 8 |
1 files changed, 8 insertions, 0 deletions
@@ -418,6 +418,8 @@ uint16_t internal_chip_readw(const chipaddr addr); uint32_t internal_chip_readl(const chipaddr addr); void internal_chip_readn(uint8_t *buf, const chipaddr addr, size_t len); #endif + +/* hwaccess.c */ void mmio_writeb(uint8_t val, void *addr); void mmio_writew(uint16_t val, void *addr); void mmio_writel(uint32_t val, void *addr); @@ -430,6 +432,12 @@ void mmio_le_writel(uint32_t val, void *addr); uint8_t mmio_le_readb(void *addr); uint16_t mmio_le_readw(void *addr); uint32_t mmio_le_readl(void *addr); +#define pci_mmio_writeb mmio_le_writeb +#define pci_mmio_writew mmio_le_writew +#define pci_mmio_writel mmio_le_writel +#define pci_mmio_readb mmio_le_readb +#define pci_mmio_readw mmio_le_readw +#define pci_mmio_readl mmio_le_readl /* programmer.c */ int noop_shutdown(void); |