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authorNico Huber <nico.huber@secunet.com>2017-06-19 12:57:10 +0200
committerNico Huber <nico.h@gmx.de>2017-07-13 16:27:55 +0000
commitd152fb95e2b7fda62a85f6c8e4112ba9f353a8d6 (patch)
treecfd2ea28b75cb90db72f488ee237a068d0cb52a4 /ichspi.c
parent731316a9128c4015bc0facd1743afeb3a080129e (diff)
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Drop redundant `enum msglevel`
Use `enum flashrom_log_level` instead to avoid further confusion. Change-Id: I1895cb8f60da3abf70c9c2953f52414cd2cc10a9 Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/20268 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'ichspi.c')
-rw-r--r--ichspi.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/ichspi.c b/ichspi.c
index 218e3b12..be13f915 100644
--- a/ichspi.c
+++ b/ichspi.c
@@ -1738,7 +1738,7 @@ int ich_init_spi(void *spibar, enum ich_chipset ich_gen)
tmp = mmio_readl(ich_spibar + ICH8_REG_VSCC);
msg_pdbg("0xC1: 0x%08x (VSCC)\n", tmp);
msg_pdbg("VSCC: ");
- prettyprint_ich_reg_vscc(tmp, MSG_DEBUG, true);
+ prettyprint_ich_reg_vscc(tmp, FLASHROM_MSG_DEBUG, true);
} else {
if (ich_generation != CHIPSET_BAYTRAIL && desc_valid) {
ichspi_bbar = mmio_readl(ich_spibar + ICH9_REG_BBAR);
@@ -1751,12 +1751,12 @@ int ich_init_spi(void *spibar, enum ich_chipset ich_gen)
tmp = mmio_readl(ich_spibar + ICH9_REG_LVSCC);
msg_pdbg("0xC4: 0x%08x (LVSCC)\n", tmp);
msg_pdbg("LVSCC: ");
- prettyprint_ich_reg_vscc(tmp, MSG_DEBUG, true);
+ prettyprint_ich_reg_vscc(tmp, FLASHROM_MSG_DEBUG, true);
tmp = mmio_readl(ich_spibar + ICH9_REG_UVSCC);
msg_pdbg("0xC8: 0x%08x (UVSCC)\n", tmp);
msg_pdbg("UVSCC: ");
- prettyprint_ich_reg_vscc(tmp, MSG_DEBUG, false);
+ prettyprint_ich_reg_vscc(tmp, FLASHROM_MSG_DEBUG, false);
tmp = mmio_readl(ich_spibar + ICH9_REG_FPB);
msg_pdbg("0xD0: 0x%08x (FPB)\n", tmp);