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author | Nikolai Artemiev <nartemiev@google.com> | 2022-11-04 14:21:39 +1100 |
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committer | Edward O'Callaghan <quasisec@chromium.org> | 2022-12-16 03:32:09 +0000 |
commit | 0741727925b841c2479b993204ce58c5eb75185a (patch) | |
tree | cbe7a30bb410cddcf24f05103acd12b73caf827c /include/i2c_helper.h | |
parent | 9394b84c00909354175e46550d454d4a26f7ca23 (diff) | |
download | flashrom-0741727925b841c2479b993204ce58c5eb75185a.tar.gz flashrom-0741727925b841c2479b993204ce58c5eb75185a.tar.bz2 flashrom-0741727925b841c2479b993204ce58c5eb75185a.zip |
ichspi.c: Read chip ID and use it to populate `flash->chip`
Read the flash chip vendor/device ID using hardware sequencing, find the
corresponding flashchip entry, and copy it over to `flash->chip`.
Identifying the chip was not previously required as ICH hardware
sequencing handles chip-level details related to read/write/erase ops.
However writeprotect operations require the chip entry to be identified
so that chip->reg_bits can be used to compute status register values.
BUG=b:253715389,b:253713774
BRANCH=none
TEST=flashrom on dedede (JSL) identifies "W25Q128.V..M" chip
TEST=flashrom -{r,v} on dedede
TEST=write/erase bios region on dedede:
flashrom -{E,w} --layout <(echo '0x381000:0xffffff bios') -i bios
Change-Id: Ia408e1e45dc6f53c0934afd6558e301abfa48ee6
Signed-off-by: Nikolai Artemiev <nartemiev@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/69195
Reviewed-by: Subrata Banik <subratabanik@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Damien Zammit
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Diffstat (limited to 'include/i2c_helper.h')
0 files changed, 0 insertions, 0 deletions