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| author | Edward O'Callaghan <quasisec@google.com> | 2022-12-27 10:33:38 +1100 |
|---|---|---|
| committer | Edward O'Callaghan <quasisec@chromium.org> | 2023-04-02 01:00:13 +0000 |
| commit | 40cc15f55db5bf68c38be5a5cb695c38e75ffb37 (patch) | |
| tree | 7772e0789e1de3eec836a966e00a99f0cc09596a /include | |
| parent | 73e47091103891f2e3c12c5c51840faf9b57e436 (diff) | |
| download | flashrom-40cc15f55db5bf68c38be5a5cb695c38e75ffb37.tar.gz flashrom-40cc15f55db5bf68c38be5a5cb695c38e75ffb37.tar.bz2 flashrom-40cc15f55db5bf68c38be5a5cb695c38e75ffb37.zip | |
board_enables: Allow for prog cfg coupling with board cfg
Some boards need to configure the programmer in specific ways.
For example, a programmer such as internal may need to be configured
either as laptop or not type and as such the board enable needs the
ability to feed state back into the programmer configuration. Plumb
this though by creating a board_cfg structure that can be packed.
Change-Id: I7058a693e714a6966a842ae97cc8da7296e63e5e
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/71623
Reviewed-by: Sam McNally <sammc@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'include')
| -rw-r--r-- | include/programmer.h | 13 |
1 files changed, 8 insertions, 5 deletions
diff --git a/include/programmer.h b/include/programmer.h index ab482e68..047f49a5 100644 --- a/include/programmer.h +++ b/include/programmer.h @@ -160,6 +160,9 @@ enum board_match_phase { P3 }; +struct board_cfg { +}; + struct board_match { /* Any device, but make it sensible, like the ISA bridge. */ uint16_t first_vendor; @@ -189,7 +192,7 @@ struct board_match { int max_rom_decode_parallel; const enum test_state status; - int (*enable) (void); /* May be NULL. */ + int (*enable) (struct board_cfg *cfg); /* May be NULL. */ }; extern const struct board_match board_matches[]; @@ -226,9 +229,9 @@ int it8705f_write_enable(uint8_t port); uint8_t sio_read(uint16_t port, uint8_t reg); void sio_write(uint16_t port, uint8_t reg, uint8_t data); void sio_mask(uint16_t port, uint8_t reg, uint8_t data, uint8_t mask); -void board_handle_before_superio(bool force_boardenable); -void board_handle_before_laptop(bool force_boardenable); -int board_flash_enable(const char *vendor, const char *model, const char *cb_vendor, const char *cb_model, bool force_boardenable); +void board_handle_before_superio(struct board_cfg *cfg, bool force_boardenable); +void board_handle_before_laptop(struct board_cfg *cfg, bool force_boardenable); +int board_flash_enable(struct board_cfg *cfg, const char *vendor, const char *model, const char *cb_vendor, const char *cb_model, bool force_boardenable); /* chipset_enable.c */ int chipset_flash_enable(const struct programmer_cfg *cfg); @@ -392,7 +395,7 @@ void internal_par_init(enum chipbustype buses); int sb600_probe_spi(const struct programmer_cfg *cfg, struct pci_dev *dev); /* wbsio_spi.c */ -int wbsio_check_for_spi(void); +int wbsio_check_for_spi(struct board_cfg *); #endif /* opaque.c */ |