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authorAnastasia Klimchuk <aklm@chromium.org>2021-10-29 10:38:37 +1100
committerNico Huber <nico.h@gmx.de>2022-02-02 21:51:26 +0000
commit0d7767ecdba86fc580503000d8915c052da16e62 (patch)
tree0c32cfc0ea7f3d4e81e5cc14a6ae2303e79675ca /it85spi.c
parente98b2d11846fe0f7a64e8739ec5d8e901a54dfc8 (diff)
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ichspi: Split very long init function into two
ich_init_spi is very long, but logically it can be split. Init function detects the chipset and then the rest of operations depends on the chipset. Init function is more readable now, it consists of only a switch. Initialisation of hwseq and swseq that used to happen in the beginning of init function now moved to init_ich_default, because hwseq and swseq are only used for chipsets served by init_ich_default. BUG=b:204488958 TEST=Check that the following scenarios still behave properly: 1) probe-read-verify-erase section-write-reboot on Intel octopus board with GD25LQ128C/GD25LQ128D/GD25LQ128E 2) probe and read on Panther Point (7 series PCH) 3) on machine with ich7 chipset, output from probe and read is the same between master and this patch Change-Id: I6789bc456a4878e6555831ae0b80ecbdbf62938b Signed-off-by: Anastasia Klimchuk <aklm@chromium.org> Tested-by: Anastasia Klimchuk <aklm@chromium.org> Tested-by: Nico Huber <nico.h@gmx.de> Tested-by: Nicholas Chin <nic.c3.14@gmail.com> Signed-off-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/58735 Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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