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| author | Thomas Heijligen <thomas.heijligen@secunet.de> | 2021-05-04 15:32:17 +0200 |
|---|---|---|
| committer | Nico Huber <nico.h@gmx.de> | 2021-06-10 12:49:16 +0000 |
| commit | 4f5169df5ff2b63a40d654ab133b8a3108b6a599 (patch) | |
| tree | d345dd5f3068a2325298234e302988b0c82a62e3 /nic3com.c | |
| parent | 085db626fbf609704136aa3cc51c70325d0b40e2 (diff) | |
| download | flashrom-4f5169df5ff2b63a40d654ab133b8a3108b6a599.tar.gz flashrom-4f5169df5ff2b63a40d654ab133b8a3108b6a599.tar.bz2 flashrom-4f5169df5ff2b63a40d654ab133b8a3108b6a599.zip | |
programmer_table: move each entry to the associated programmer source
Change-Id: I3d02bd789f0299e936eb86819b3b15b5ea2bb921
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.de>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/52946
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'nic3com.c')
| -rw-r--r-- | nic3com.c | 14 |
1 files changed, 12 insertions, 2 deletions
@@ -35,7 +35,7 @@ struct nic3com_data { uint16_t id; }; -const struct dev_entry nics_3com[] = { +static const struct dev_entry nics_3com[] = { /* 3C90xB */ {0x10b7, 0x9055, OK, "3COM", "3C90xB: PCI 10/100 Mbps; shared 10BASE-T/100BASE-TX"}, {0x10b7, 0x9001, NT, "3COM", "3C90xB: PCI 10/100 Mbps; shared 10BASE-T/100BASE-T4" }, @@ -101,7 +101,7 @@ static int nic3com_shutdown(void *par_data) return 0; } -int nic3com_init(void) +static int nic3com_init(void) { struct pci_dev *dev = NULL; uint32_t io_base_addr = 0; @@ -169,6 +169,16 @@ init_err_cleanup_exit: return 1; } +const struct programmer_entry programmer_nic3com = { + .name = "nic3com", + .type = PCI, + .devs.dev = nics_3com, + .init = nic3com_init, + .map_flash_region = fallback_map, + .unmap_flash_region = fallback_unmap, + .delay = internal_delay, +}; + #else #error PCI port I/O access is not supported on this architecture yet. #endif |