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author | Nico Huber <nico.huber@secunet.com> | 2016-04-29 16:40:15 +0200 |
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committer | David Hendricks <david.hendricks@gmail.com> | 2017-06-03 20:07:39 +0200 |
commit | 7af0e79b44bdc86497a992a90855f284e74d73f1 (patch) | |
tree | df4c2b5d2776597d14b459f9c5e8430a55c7c075 /nicintel_eeprom.c | |
parent | 3a9939b952e614cd8e9e0530c22453f8f91c4e3a (diff) | |
download | flashrom-7af0e79b44bdc86497a992a90855f284e74d73f1.tar.gz flashrom-7af0e79b44bdc86497a992a90855f284e74d73f1.tar.bz2 flashrom-7af0e79b44bdc86497a992a90855f284e74d73f1.zip |
Add functions to read/erase/write/verify by layout
Inspired by Lynxis' related work, this implements a foundation for
layout based flash access.
All operations iterate over the given layout regions. Erase and write
then walk, per region, over all erase blocks in an inner loop (which
might not be what we want, see note on optimization below). Special care
has been taken that flash content is merged properly, in case an erase
block is only partially covered by a layout region or even affects mul-
tiple regions.
A note on performance: In the case an erase block affects multiple
regions, it will probably be read, erased and written for each region.
Another approach would be to walk all erase blocks once and check for
each erase block which regions it touches (i.e. for each erase block,
merge data pontentially from the flash and all layout regions, then
flash the combined data). That might result in cleaner code. I haven't
tried it yet, though.
Change-Id: Ic6194cea4c4c430e0cf9d586052508a865b09c86
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/17945
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
Diffstat (limited to 'nicintel_eeprom.c')
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