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author | Sergii Dmytruk <sergii.dmytruk@3mdeb.com> | 2021-11-08 00:06:33 +0200 |
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committer | Anastasia Klimchuk <aklm@chromium.org> | 2022-05-12 03:05:04 +0000 |
commit | 8245b57e471963d9b3a48b30d3b7f7f26ef8ab57 (patch) | |
tree | 1d69b6aef2729d791b952066c0b11e7645992086 /programmer_table.c | |
parent | e9367e614e193ed8bc0409903b02a9dac9f88c25 (diff) | |
download | flashrom-8245b57e471963d9b3a48b30d3b7f7f26ef8ab57.tar.gz flashrom-8245b57e471963d9b3a48b30d3b7f7f26ef8ab57.tar.bz2 flashrom-8245b57e471963d9b3a48b30d3b7f7f26ef8ab57.zip |
dummyflasher: emulate SR2 and SR3 for W25Q128FV
Enable emulation of SR2 and SR3 for W25Q128FV and provide logic for
updating them (masks of read-only bits that can't be set from outside).
TEST=check how input value affects status registers of emulated chip
flashrom -V -p dummy:emulate=W25Q128FV,spi_status=0x12 |
grep -A3 'Initial status registers'
flashrom -V -p dummy:emulate=W25Q128FV,spi_status=0x1234 |
grep -A3 'Initial status registers'
flashrom -V -p dummy:emulate=W25Q128FV,spi_status=0x123456 |
grep -A3 'Initial status registers'
Change-Id: I79f9b4a0b604663d3288ad70dcbe3ea4075dede5
Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/59073
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-by: Thomas Heijligen <src@posteo.de>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Diffstat (limited to 'programmer_table.c')
0 files changed, 0 insertions, 0 deletions