raiden_debug_spi.c: Add a delay following AP/EC flash enable

Add a delay following the AP and EC flash enable requests. This allows
any power rails enabled by these signals to settle and to meet the power
on to first SPI write timing requirements.

Forward ports the downstream commit:
   https://chromium-review.googlesource.com/c/chromiumos/third_party/flashrom/+/2036738

Change-Id: I4c1777777ee67580605c6e6f4c0c228cccc392c7
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/39312
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>

1 files changed, 9 insertions, 0 deletions

diff --git a/raiden_debug_spi.c b/raiden_debug_spi.c
index fa422682..69144554 100644
--- a/raiden_debug_spi.c
+++ b/raiden_debug_spi.c
@@ -562,6 +562,15 @@ loop_end:
 		return ret;
 	}
 
+	/*
+	 * Allow for power to settle on the AP and EC flash devices.
+	 * Load switches can have a 1-3 ms turn on time, and SPI flash devices
+	 * can require up to 10 ms from power on to the first write.
+	 */
+	if ((request_enable == RAIDEN_DEBUG_SPI_REQ_ENABLE_AP) ||
+		(request_enable == RAIDEN_DEBUG_SPI_REQ_ENABLE_EC))
+		usleep(50 * 1000);
+
 	register_spi_master(&spi_master_raiden_debug);
 	register_shutdown(shutdown, NULL);