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authorKonstantin Grudnev <grudnevkv@gmail.com>2019-07-23 00:48:54 +0300
committerNico Huber <nico.h@gmx.de>2019-10-04 17:41:01 +0000
commit3d8868c2b46548be6885198987492d91933c9ff7 (patch)
tree2277db98f8b19982802f812b2a984a2591009e37 /spi.h
parent4a84ec273a487c27f91bd3df70cbdf8894af70e1 (diff)
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Add support for M95M02-A125
Automotive 2 Mbit (256KiB) serial SPI bus EEPROM PREW tested successfully with use of ch341a programmer on Linux host 5.2.0-1-MANJARO x86_64 Signed-off-by: Konstantin Grudnev <grudnevkv@gmail.com> Change-Id: Ic29cd9051c7eac4822d620c299834134f987f01b Reviewed-on: https://review.coreboot.org/c/flashrom/+/34496 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'spi.h')
-rw-r--r--spi.h7
1 files changed, 7 insertions, 0 deletions
diff --git a/spi.h b/spi.h
index 0073c712..3f45038a 100644
--- a/spi.h
+++ b/spi.h
@@ -28,6 +28,13 @@
/* INSIZE may be 0x04 for some chips*/
#define JEDEC_RDID_INSIZE 0x03
+/* Some ST M95X model */
+#define ST_M95_RDID 0x83
+#define ST_M95_RDID_3BA_OUTSIZE 0x04 /* 8b op, 24bit addr where size >64KiB */
+#define ST_M95_RDID_2BA_OUTSIZE 0x03 /* 8b op, 16bit addr where size <=64KiB */
+#define ST_M95_RDID_OUTSIZE_MAX 0x04 /* ST_M95_RDID_3BA_OUTSIZE */
+#define ST_M95_RDID_INSIZE 0x03
+
/* Some Atmel AT25F* models have bit 3 as don't care bit in commands */
#define AT25F_RDID 0x15 /* 0x15 or 0x1d */
#define AT25F_RDID_OUTSIZE 0x01