diff options
| author | Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> | 2011-02-15 22:44:27 +0000 |
|---|---|---|
| committer | Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> | 2011-02-15 22:44:27 +0000 |
| commit | 8a19ef1f6724bd6dfd19a8c7d5ff521bc62e5632 (patch) | |
| tree | 0a7cc883e6a343e3e8f4a4652e39913862829f75 /sst49lfxxxc.c | |
| parent | c753e5bbf9805ea2ec703e5013705a438747f223 (diff) | |
| download | flashrom-8a19ef1f6724bd6dfd19a8c7d5ff521bc62e5632.tar.gz flashrom-8a19ef1f6724bd6dfd19a8c7d5ff521bc62e5632.tar.bz2 flashrom-8a19ef1f6724bd6dfd19a8c7d5ff521bc62e5632.zip | |
Support 64-bit MEM BARs wherever possible
Add more sanity checks for BARs and abort if resources are unreachable.
Undecoded resources are reported, but flashrom will proceed anyway just
in case the BIOS screwed up the configuration.
(The empty CardBus handler is intentional, according to the spec no BARs
in PCI config space are used by CardBus.)
Found while working on a driver for the Angelbird PCIe-based SSD which
has 64-bit capable MEM BARs.
Corresponding to flashrom svn r1261.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'sst49lfxxxc.c')
0 files changed, 0 insertions, 0 deletions