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| author | Edward O'Callaghan <quasisec@google.com> | 2022-05-20 15:21:07 +1000 |
|---|---|---|
| committer | Edward O'Callaghan <quasisec@chromium.org> | 2022-06-21 03:39:34 +0000 |
| commit | b4dd9f9039d0dc5f1747e1b27e62ba13b0bc0c6f (patch) | |
| tree | 138c23fcf364d1970916e4063bc546c7debfab9c /sst49lfxxxc.c | |
| parent | f630a1623f84b452873e3fc69d608925d90fd85b (diff) | |
| download | flashrom-b4dd9f9039d0dc5f1747e1b27e62ba13b0bc0c6f.tar.gz flashrom-b4dd9f9039d0dc5f1747e1b27e62ba13b0bc0c6f.tar.bz2 flashrom-b4dd9f9039d0dc5f1747e1b27e62ba13b0bc0c6f.zip | |
ichspi.c: Implement read_write_status for wp
The ichspi hwseq path has a opaque master specialisation that
allows for reading and writing STATUS1 registers. Hook the callbacks
with a implementation to allow for this so that writeprotect maybe
supported though this path.
BUG=none
BRANCH=none
TEST=flashrom --wp-status on AMD and Intel DUTs
Change-Id: I7ecbe8491ecea3697922c91af26ca62276e86317
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/64540
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Diffstat (limited to 'sst49lfxxxc.c')
0 files changed, 0 insertions, 0 deletions