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author | Edward O'Callaghan <quasisec@google.com> | 2022-12-25 11:06:10 +1100 |
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committer | Edward O'Callaghan <quasisec@chromium.org> | 2023-01-13 11:18:54 +0000 |
commit | c1fb4bd9fd70d59eaeec41add5d449da9347f9fa (patch) | |
tree | 8605fbcbc357beb9b134c7b86ddad84586997e61 /stlinkv3_spi.c | |
parent | e4c51439ac82a0e29186afd1ed44fd51bdc1067a (diff) | |
download | flashrom-c1fb4bd9fd70d59eaeec41add5d449da9347f9fa.tar.gz flashrom-c1fb4bd9fd70d59eaeec41add5d449da9347f9fa.tar.bz2 flashrom-c1fb4bd9fd70d59eaeec41add5d449da9347f9fa.zip |
programmer.h: Guard against sending spi commands on non-spi mst
Validate (flash->chip->bustype == BUS_SPI) as ich copies the
chip flags in the opaque master and tries incorrectly
to issue 4BA commands which results in failure.
The issue was detected only in the case of chips >16MB, in
this case 'W25Q256FV' that has the feature bits:
```
.feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_ENTER_WREN |
FEATURE_4BA_EAR_C5C8 | FEATURE_4BA_READ | FEATURE_4BA_FAST_READ |
FEATURE_WRSR2,
```
The regression was noticed from,
commit 0741727925b841c2479b993204ce58c5eb75185a ichspi.c: Read chip ID and use it to populate `flash->chip`
TEST=In the case of 'W25Q256FV' on TigerLake.
Change-Id: I7cce4f9c032d33c01bf616e27a50b9727a40fe1b
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/71269
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jonathon Hall <jonathon.hall@puri.sm>
Reviewed-by: Sam McNally <sammc@google.com>
Diffstat (limited to 'stlinkv3_spi.c')
0 files changed, 0 insertions, 0 deletions