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| author | Michał Żygowski <michal.zygowski@3mdeb.com> | 2021-06-16 15:13:54 +0200 |
|---|---|---|
| committer | Nico Huber <nico.h@gmx.de> | 2021-11-17 12:11:17 +0000 |
| commit | 93b01904db607ef8169047e68e376dcda1bd7fbe (patch) | |
| tree | e57bbe3307e6901bb0d084158877b4188be96fbe /util | |
| parent | 5020cf3a6216879a1c07141bd15bc19044158767 (diff) | |
| download | flashrom-93b01904db607ef8169047e68e376dcda1bd7fbe.tar.gz flashrom-93b01904db607ef8169047e68e376dcda1bd7fbe.tar.bz2 flashrom-93b01904db607ef8169047e68e376dcda1bd7fbe.zip | |
Add Tiger Lake U Premium support
Tiger Lake has very low ICCRIBA (TGL=0x11, CNL=0x34 and CML=0x34) and
detects as unknown chipset compatible with 300 series chipset. Add a
new enum CHIPSET_500_SERIES_TIGER_POINT and treat it identically to
CHIPSET_400_SERIES_COMET_POINT. There are some exceptions though,
ICCRIBA is no longer present n descriptor content so a new union has
been defined for new fields and used in descriptor guessing.
freq_read field is not present on Tiger Lake, moreover in CannonPoint
and Comet Point this field is used as eSPI/EC frequency, so a new
function to print read frequency has ben added. Finally Tiger lake
boot straps include eSPI, so a new bus has been added for the new
straps.
TEST=Flash BIOS region on Intel i5-1135G7
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Change-Id: I28f3b6fe9f8ce9e976a6808683f46b6f4ec72bdd
Reviewed-on: https://review.coreboot.org/c/flashrom/+/55578
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'util')
| -rw-r--r-- | util/ich_descriptors_tool/ich_descriptors_tool.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/util/ich_descriptors_tool/ich_descriptors_tool.c b/util/ich_descriptors_tool/ich_descriptors_tool.c index 0807f5e3..a1e353ba 100644 --- a/util/ich_descriptors_tool/ich_descriptors_tool.c +++ b/util/ich_descriptors_tool/ich_descriptors_tool.c @@ -136,6 +136,7 @@ static void usage(char *argv[], const char *error) "\t- \"100\" or \"sunrise\" for Intel's 100 series chipsets.\n" "\t- \"300\" or \"cannon\" for Intel's 300 series chipsets.\n" "\t- \"400\" or \"comet\" for Intel's 400 series chipsets.\n" +"\t- \"500\" or \"tiger\" for Intel's 500 series chipsets.\n" "If '-d' is specified some regions such as the BIOS image as seen by the CPU or\n" "the GbE blob that is required to initialize the GbE are also dumped to files.\n", argv[0], argv[0]); @@ -230,6 +231,9 @@ int main(int argc, char *argv[]) else if ((strcmp(csn, "400") == 0) || (strcmp(csn, "comet") == 0)) cs = CHIPSET_400_SERIES_COMET_POINT; + else if ((strcmp(csn, "500") == 0) || + (strcmp(csn, "tiger") == 0)) + cs = CHIPSET_500_SERIES_TIGER_POINT; else if (strcmp(csn, "apollo") == 0) cs = CHIPSET_APOLLO_LAKE; else if (strcmp(csn, "gemini") == 0) |