diff options
-rw-r--r-- | atahpt.c | 3 | ||||
-rw-r--r-- | drkaiser.c | 3 | ||||
-rw-r--r-- | flashrom.c | 19 | ||||
-rw-r--r-- | gfxnvidia.c | 3 | ||||
-rw-r--r-- | nic3com.c | 3 | ||||
-rw-r--r-- | nicintel_spi.c | 3 | ||||
-rw-r--r-- | nicnatsemi.c | 3 | ||||
-rw-r--r-- | nicrealtek.c | 19 | ||||
-rw-r--r-- | ogp_spi.c | 3 | ||||
-rw-r--r-- | pcidev.c | 9 | ||||
-rw-r--r-- | print.c | 3 | ||||
-rw-r--r-- | print_wiki.c | 1 | ||||
-rw-r--r-- | programmer.h | 5 | ||||
-rw-r--r-- | satamv.c | 2 | ||||
-rw-r--r-- | satasii.c | 2 |
15 files changed, 18 insertions, 63 deletions
@@ -44,8 +44,7 @@ int atahpt_init(void) get_io_perms(); - io_base_addr = pcidev_init(PCI_VENDOR_ID_HPT, PCI_BASE_ADDRESS_4, - ata_hpt); + io_base_addr = pcidev_init(PCI_BASE_ADDRESS_4, ata_hpt); /* Enable flash access. */ reg32 = pci_read_long(pcidev_dev, REG_FLASH_ACCESS); @@ -43,8 +43,7 @@ int drkaiser_init(void) get_io_perms(); - addr = pcidev_init(PCI_VENDOR_ID_DRKAISER, PCI_BASE_ADDRESS_2, - drkaiser_pcidev); + addr = pcidev_init(PCI_BASE_ADDRESS_2, drkaiser_pcidev); /* Write magic register to enable flash write. */ rpci_write_word(pcidev_dev, PCI_MAGIC_DRKAISER_ADDR, @@ -61,7 +61,6 @@ enum programmer programmer = #endif #if CONFIG_NICREALTEK == 1 PROGRAMMER_NICREALTEK - PROGRAMMER_NICREALTEK2 #endif #if CONFIG_NICNATSEMI == 1 PROGRAMMER_NICNATSEMI @@ -182,7 +181,9 @@ const struct programmer_entry programmer_table[] = { #if CONFIG_NICREALTEK == 1 { + /* This programmer works for Realtek RTL8139 and SMC 1211. */ .name = "nicrealtek", + //.name = "nicsmc1211", .init = nicrealtek_init, .shutdown = nicrealtek_shutdown, .map_flash_region = fallback_map, @@ -197,22 +198,6 @@ const struct programmer_entry programmer_table[] = { .chip_writen = fallback_chip_writen, .delay = internal_delay, }, - { - .name = "nicsmc1211", - .init = nicsmc1211_init, - .shutdown = nicrealtek_shutdown, - .map_flash_region = fallback_map, - .unmap_flash_region = fallback_unmap, - .chip_readb = nicrealtek_chip_readb, - .chip_readw = fallback_chip_readw, - .chip_readl = fallback_chip_readl, - .chip_readn = fallback_chip_readn, - .chip_writeb = nicrealtek_chip_writeb, - .chip_writew = fallback_chip_writew, - .chip_writel = fallback_chip_writel, - .chip_writen = fallback_chip_writen, - .delay = internal_delay, - }, #endif #if CONFIG_NICNATSEMI == 1 diff --git a/gfxnvidia.c b/gfxnvidia.c index b6dc5f49..60498b11 100644 --- a/gfxnvidia.c +++ b/gfxnvidia.c @@ -66,8 +66,7 @@ int gfxnvidia_init(void) get_io_perms(); - io_base_addr = pcidev_init(PCI_VENDOR_ID_NVIDIA, PCI_BASE_ADDRESS_0, - gfx_nvidia); + io_base_addr = pcidev_init(PCI_BASE_ADDRESS_0, gfx_nvidia); io_base_addr += 0x300000; msg_pinfo("Detected NVIDIA I/O base address: 0x%x.\n", io_base_addr); @@ -59,8 +59,7 @@ int nic3com_init(void) { get_io_perms(); - io_base_addr = pcidev_init(PCI_VENDOR_ID_3COM, PCI_BASE_ADDRESS_0, - nics_3com); + io_base_addr = pcidev_init(PCI_BASE_ADDRESS_0, nics_3com); id = pcidev_dev->device_id; diff --git a/nicintel_spi.c b/nicintel_spi.c index 2d2d5b22..3882e81f 100644 --- a/nicintel_spi.c +++ b/nicintel_spi.c @@ -144,8 +144,7 @@ int nicintel_spi_init(void) get_io_perms(); - io_base_addr = pcidev_init(PCI_VENDOR_ID_INTEL, PCI_BASE_ADDRESS_0, - nics_intel_spi); + io_base_addr = pcidev_init(PCI_BASE_ADDRESS_0, nics_intel_spi); nicintel_spibar = physmap("Intel Gigabit NIC w/ SPI flash", io_base_addr, 4096); diff --git a/nicnatsemi.c b/nicnatsemi.c index 16838570..3cae2536 100644 --- a/nicnatsemi.c +++ b/nicnatsemi.c @@ -39,8 +39,7 @@ int nicnatsemi_init(void) { get_io_perms(); - io_base_addr = pcidev_init(PCI_VENDOR_ID_NATSEMI, PCI_BASE_ADDRESS_0, - nics_natsemi); + io_base_addr = pcidev_init(PCI_BASE_ADDRESS_0, nics_natsemi); buses_supported = CHIP_BUSTYPE_PARALLEL; diff --git a/nicrealtek.c b/nicrealtek.c index c32e5d68..d97deb1e 100644 --- a/nicrealtek.c +++ b/nicrealtek.c @@ -32,10 +32,6 @@ const struct pcidev_status nics_realtek[] = { {0x10ec, 0x8139, OK, "Realtek", "RTL8139/8139C/8139C+"}, - {}, -}; - -const struct pcidev_status nics_realteksmc1211[] = { {0x1113, 0x1211, OK, "SMC2", "1211TX"}, /* RTL8139 clone */ {}, }; @@ -44,20 +40,7 @@ int nicrealtek_init(void) { get_io_perms(); - io_base_addr = pcidev_init(PCI_VENDOR_ID_REALTEK, PCI_BASE_ADDRESS_0, - nics_realtek); - - buses_supported = CHIP_BUSTYPE_PARALLEL; - - return 0; -} - -int nicsmc1211_init(void) -{ - get_io_perms(); - - io_base_addr = pcidev_init(PCI_VENDOR_ID_SMC1211, PCI_BASE_ADDRESS_0, - nics_realteksmc1211); + io_base_addr = pcidev_init(PCI_BASE_ADDRESS_0, nics_realtek); buses_supported = CHIP_BUSTYPE_PARALLEL; @@ -120,8 +120,7 @@ int ogp_spi_init(void) get_io_perms(); - io_base_addr = pcidev_init(PCI_VENDOR_ID_OGP, PCI_BASE_ADDRESS_0, - ogp_spi); + io_base_addr = pcidev_init(PCI_BASE_ADDRESS_0, ogp_spi); ogp_spibar = physmap("OGP registers", io_base_addr, 4096); @@ -188,8 +188,7 @@ uintptr_t pcidev_validate(struct pci_dev *dev, int bar, return 0; } -uintptr_t pcidev_init(uint16_t vendor_id, int bar, - const struct pcidev_status *devs) +uintptr_t pcidev_init(int bar, const struct pcidev_status *devs) { struct pci_dev *dev; struct pci_filter filter; @@ -203,8 +202,7 @@ uintptr_t pcidev_init(uint16_t vendor_id, int bar, pci_scan_bus(pacc); /* We want to get the list of devices */ pci_filter_init(pacc, &filter); - /* Filter by vendor and also bb:dd.f (if supplied by the user). */ - filter.vendor = vendor_id; + /* Filter by bb:dd.f (if supplied by the user). */ pcidev_bdf = extract_programmer_param("pci"); if (pcidev_bdf != NULL) { if ((msg = pci_filter_parse_slot(&filter, pcidev_bdf))) { @@ -216,6 +214,9 @@ uintptr_t pcidev_init(uint16_t vendor_id, int bar, for (dev = pacc->devices; dev; dev = dev->next) { if (pci_filter_match(&filter, dev)) { + /* FIXME: We should count all matching devices, not + * just those with a valid BAR. + */ if ((addr = pcidev_validate(dev, bar, devs)) != 0) { curaddr = addr; pcidev_dev = dev; @@ -249,9 +249,6 @@ void print_supported(void) printf("\nSupported devices for the %s programmer:\n", programmer_table[PROGRAMMER_NICREALTEK].name); print_supported_pcidevs(nics_realtek); - printf("\nSupported devices for the %s programmer:\n", - programmer_table[PROGRAMMER_NICREALTEK2].name); - print_supported_pcidevs(nics_realteksmc1211); #endif #if CONFIG_NICNATSEMI == 1 printf("\nSupported devices for the %s programmer:\n", diff --git a/print_wiki.c b/print_wiki.c index d71c5716..7b354d9d 100644 --- a/print_wiki.c +++ b/print_wiki.c @@ -279,7 +279,6 @@ void print_supported_wiki(void) #endif #if CONFIG_NICREALTEK == 1 print_supported_pcidevs_wiki(nics_realtek); - print_supported_pcidevs_wiki(nics_realteksmc1211); #endif #if CONFIG_NICNATSEMI == 1 print_supported_pcidevs_wiki(nics_natsemi); diff --git a/programmer.h b/programmer.h index 7a497f83..47b3e4ac 100644 --- a/programmer.h +++ b/programmer.h @@ -36,7 +36,6 @@ enum programmer { #endif #if CONFIG_NICREALTEK == 1 PROGRAMMER_NICREALTEK, - PROGRAMMER_NICREALTEK2, #endif #if CONFIG_NICNATSEMI == 1 PROGRAMMER_NICNATSEMI, @@ -220,7 +219,7 @@ struct pcidev_status { const char *device_name; }; uintptr_t pcidev_validate(struct pci_dev *dev, int bar, const struct pcidev_status *devs); -uintptr_t pcidev_init(uint16_t vendor_id, int bar, const struct pcidev_status *devs); +uintptr_t pcidev_init(int bar, const struct pcidev_status *devs); /* rpci_write_* are reversible writes. The original PCI config space register * contents will be restored on shutdown. */ @@ -384,12 +383,10 @@ extern const struct pcidev_status drkaiser_pcidev[]; /* nicrealtek.c */ #if CONFIG_NICREALTEK == 1 int nicrealtek_init(void); -int nicsmc1211_init(void); int nicrealtek_shutdown(void); void nicrealtek_chip_writeb(uint8_t val, chipaddr addr); uint8_t nicrealtek_chip_readb(const chipaddr addr); extern const struct pcidev_status nics_realtek[]; -extern const struct pcidev_status nics_realteksmc1211[]; #endif /* nicnatsemi.c */ @@ -67,7 +67,7 @@ int satamv_init(void) /* No need to check for errors, pcidev_init() will not return in case * of errors. */ - addr = pcidev_init(0x11ab, PCI_BASE_ADDRESS_0, satas_mv); + addr = pcidev_init(PCI_BASE_ADDRESS_0, satas_mv); mv_bar = physmap("Marvell 88SX7042 registers", addr, 0x20000); if (mv_bar == ERROR_PTR) @@ -47,7 +47,7 @@ int satasii_init(void) get_io_perms(); - pcidev_init(PCI_VENDOR_ID_SII, PCI_BASE_ADDRESS_0, satas_sii); + pcidev_init(PCI_BASE_ADDRESS_0, satas_sii); id = pcidev_dev->device_id; |