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-rw-r--r--chipdrivers.h1
-rw-r--r--flashchips.c35
-rw-r--r--flashchips.h1
-rw-r--r--spi25_statusreg.c13
4 files changed, 50 insertions, 0 deletions
diff --git a/chipdrivers.h b/chipdrivers.h
index f270b554..4cebff96 100644
--- a/chipdrivers.h
+++ b/chipdrivers.h
@@ -71,6 +71,7 @@ int spi_prettyprint_status_register_default_bp1(struct flashctx *flash);
int spi_prettyprint_status_register_default_bp2(struct flashctx *flash);
int spi_prettyprint_status_register_default_bp3(struct flashctx *flash);
int spi_prettyprint_status_register_default_bp4(struct flashctx *flash);
+int spi_prettyprint_status_register_bp2_bpl(struct flashctx *flash);
int spi_disable_blockprotect(struct flashctx *flash);
int spi_disable_blockprotect_bp2_srwd(struct flashctx *flash);
int spi_disable_blockprotect_bp3_srwd(struct flashctx *flash);
diff --git a/flashchips.c b/flashchips.c
index a082e75a..a21e21ab 100644
--- a/flashchips.c
+++ b/flashchips.c
@@ -3118,6 +3118,41 @@ const struct flashchip flashchips[] = {
},
{
+ .vendor = "ESMT",
+ .name = "F25L32PA",
+ .bustype = BUS_SPI,
+ .manufacture_id = ESMT_ID,
+ .model_id = ESMT_F25L32PA,
+ .total_size = 4096,
+ .page_size = 256,
+ .feature_bits = FEATURE_WRSR_EITHER | FEATURE_OTP,
+ .tested = TEST_UNTESTED,
+ .probe = probe_spi_rdid,
+ .probe_timing = TIMING_ZERO,
+ .block_erasers =
+ {
+ {
+ .eraseblocks = { {4 * 1024, 1024} },
+ .block_erase = spi_block_erase_20,
+ }, {
+ .eraseblocks = { {64 * 1024, 64} },
+ .block_erase = spi_block_erase_d8,
+ }, {
+ .eraseblocks = { {4 * 1024 * 1024, 1} },
+ .block_erase = spi_block_erase_60,
+ }, {
+ .eraseblocks = { {4 * 1024 * 1024, 1} },
+ .block_erase = spi_block_erase_c7,
+ }
+ },
+ .printlock = spi_prettyprint_status_register_bp2_bpl,
+ .unlock = spi_disable_blockprotect,
+ .write = spi_chip_write_256,
+ .read = spi_chip_read,
+ .voltage = {2700, 3600},
+ },
+
+ {
.vendor = "Eon",
.name = "EN25B05",
.bustype = BUS_SPI,
diff --git a/flashchips.h b/flashchips.h
index 234e58c6..383dc139 100644
--- a/flashchips.h
+++ b/flashchips.h
@@ -208,6 +208,7 @@
#define ESMT_ID 0x8C /* Elite Semiconductor Memory Technology (ESMT) / EFST Elite Flash Storage */
#define ESMT_F25L008A 0x2014
+#define ESMT_F25L32PA 0x2016
#define ESMT_F25D08QA 0x2534
#define ESMT_F25L16QA2S 0x4015
#define ESMT_F25L32QA 0x4016
diff --git a/spi25_statusreg.c b/spi25_statusreg.c
index f96d4e8f..9f8c9ae0 100644
--- a/spi25_statusreg.c
+++ b/spi25_statusreg.c
@@ -354,6 +354,19 @@ int spi_prettyprint_status_register_default_bp4(struct flashctx *flash)
return 0;
}
+int spi_prettyprint_status_register_bp2_bpl(struct flashctx *flash)
+{
+ uint8_t status = spi_read_status_register(flash);
+ spi_prettyprint_status_register_hex(status);
+
+ spi_prettyprint_status_register_bpl(status);
+ spi_prettyprint_status_register_bit(status, 6);
+ spi_prettyprint_status_register_bit(status, 5);
+ spi_prettyprint_status_register_bp(status, 2);
+ spi_prettyprint_status_register_welwip(status);
+ return 0;
+}
+
/* === Amic ===
* FIXME: spi_disable_blockprotect is incorrect but works fine for chips using
* spi_prettyprint_status_register_default_bp1 or