diff options
| -rw-r--r-- | flash.h | 14 | ||||
| -rw-r--r-- | flashchips.c | 2 | ||||
| -rw-r--r-- | flashrom.c | 2 | ||||
| -rw-r--r-- | spi25.c | 2 |
4 files changed, 12 insertions, 8 deletions
@@ -117,21 +117,23 @@ enum write_granularity { #define FEATURE_QPI (1 << 9) #define FEATURE_4BA_ENTER (1 << 10) /**< Can enter/exit 4BA mode with instructions 0xb7/0xe9 w/o WREN */ #define FEATURE_4BA_ENTER_WREN (1 << 11) /**< Can enter/exit 4BA mode with instructions 0xb7/0xe9 after WREN */ -#define FEATURE_4BA_EXT_ADDR (1 << 12) /**< Regular 3-byte operations can be used by writing the most +#define FEATURE_4BA_ENTER_EAR7 (1 << 12) /**< Can enter/exit 4BA mode by setting bit7 of the ext addr reg */ +#define FEATURE_4BA_EXT_ADDR (1 << 13) /**< Regular 3-byte operations can be used by writing the most significant address byte into an extended address register. */ -#define FEATURE_4BA_READ (1 << 13) /**< Native 4BA read instruction (0x13) is supported. */ -#define FEATURE_4BA_FAST_READ (1 << 14) /**< Native 4BA fast read instruction (0x0c) is supported. */ -#define FEATURE_4BA_WRITE (1 << 15) /**< Native 4BA byte program (0x12) is supported. */ +#define FEATURE_4BA_READ (1 << 14) /**< Native 4BA read instruction (0x13) is supported. */ +#define FEATURE_4BA_FAST_READ (1 << 15) /**< Native 4BA fast read instruction (0x0c) is supported. */ +#define FEATURE_4BA_WRITE (1 << 16) /**< Native 4BA byte program (0x12) is supported. */ /* 4BA Shorthands */ #define FEATURE_4BA_NATIVE (FEATURE_4BA_READ | FEATURE_4BA_FAST_READ | FEATURE_4BA_WRITE) #define FEATURE_4BA (FEATURE_4BA_ENTER | FEATURE_4BA_EXT_ADDR | FEATURE_4BA_NATIVE) #define FEATURE_4BA_WREN (FEATURE_4BA_ENTER_WREN | FEATURE_4BA_EXT_ADDR | FEATURE_4BA_NATIVE) +#define FEATURE_4BA_EAR7 (FEATURE_4BA_ENTER_EAR7 | FEATURE_4BA_EXT_ADDR | FEATURE_4BA_NATIVE) /* * Most flash chips are erased to ones and programmed to zeros. However, some * other flash chips, such as the ENE KB9012 internal flash, work the opposite way. */ -#define FEATURE_ERASED_ZERO (1 << 16) -#define FEATURE_NO_ERASE (1 << 17) +#define FEATURE_ERASED_ZERO (1 << 17) +#define FEATURE_NO_ERASE (1 << 18) #define ERASED_VALUE(flash) (((flash)->chip->feature_bits & FEATURE_ERASED_ZERO) ? 0x00 : 0xff) diff --git a/flashchips.c b/flashchips.c index 78538492..c75e0b8a 100644 --- a/flashchips.c +++ b/flashchips.c @@ -12524,7 +12524,7 @@ const struct flashchip flashchips[] = { .total_size = 32768, .page_size = 256, /* OTP: 1024B total, 32B reserved; read 0x4B; write 0x42 */ - .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_EXT_ADDR, + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_ENTER_EAR7, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -2260,7 +2260,7 @@ int prepare_flash_access(struct flashctx *const flash, flash->in_4ba_mode = false; /* Enable/disable 4-byte addressing mode if flash chip supports it */ - if (flash->chip->feature_bits & (FEATURE_4BA_ENTER | FEATURE_4BA_ENTER_WREN)) { + if (flash->chip->feature_bits & (FEATURE_4BA_ENTER | FEATURE_4BA_ENTER_WREN | FEATURE_4BA_ENTER_EAR7)) { int ret; if (spi_master_4ba(flash)) ret = spi_enter_4ba(flash); @@ -849,6 +849,8 @@ static int spi_enter_exit_4ba(struct flashctx *const flash, const bool enter) ret = spi_send_command(flash, sizeof(cmd), 0, &cmd, NULL); else if (flash->chip->feature_bits & FEATURE_4BA_ENTER_WREN) ret = spi_simple_write_cmd(flash, cmd, 0); + else if (flash->chip->feature_bits & FEATURE_4BA_ENTER_EAR7) + ret = spi_set_extended_address(flash, enter ? 0x80 : 0x00); if (!ret) flash->in_4ba_mode = enter; |