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-rw-r--r--flash.h11
-rw-r--r--flashchips.c55
2 files changed, 50 insertions, 16 deletions
diff --git a/flash.h b/flash.h
index 6e86c354..d31b2568 100644
--- a/flash.h
+++ b/flash.h
@@ -98,9 +98,9 @@ enum write_granularity {
/*
* How many different erase functions do we have per chip?
- * Atmel AT25FS010 has 6 different functions.
+ * Macronix MX25L25635F has 8 different functions.
*/
-#define NUM_ERASEFUNCTIONS 6
+#define NUM_ERASEFUNCTIONS 8
/* Feature bits used for non-SPI only */
#define FEATURE_REGISTERMAP (1 << 0)
@@ -124,7 +124,12 @@ enum write_granularity {
#define FEATURE_4BA_EXT_ADDR (1 << 12) /**< Regular 3-byte operations can be used by writing the most
significant address byte into an extended address register. */
#define FEATURE_4BA_READ (1 << 13) /**< Native 4BA read instruction (0x13) is supported. */
-#define FEATURE_4BA_WRITE (1 << 14) /**< Native 4BA byte program (0x12) is supported. */
+#define FEATURE_4BA_FAST_READ (1 << 14) /**< Native 4BA fast read instruction (0x0c) is supported. */
+#define FEATURE_4BA_WRITE (1 << 15) /**< Native 4BA byte program (0x12) is supported. */
+/* 4BA Shorthands */
+#define FEATURE_4BA_NATIVE (FEATURE_4BA_READ | FEATURE_4BA_FAST_READ | FEATURE_4BA_WRITE)
+#define FEATURE_4BA (FEATURE_4BA_ENTER | FEATURE_4BA_EXT_ADDR | FEATURE_4BA_NATIVE)
+#define FEATURE_4BA_WREN (FEATURE_4BA_ENTER_WREN | FEATURE_4BA_EXT_ADDR | FEATURE_4BA_NATIVE)
enum test_state {
OK = 0,
diff --git a/flashchips.c b/flashchips.c
index 0e16a48c..e389af66 100644
--- a/flashchips.c
+++ b/flashchips.c
@@ -8127,27 +8127,36 @@ const struct flashchip flashchips[] = {
{
.vendor = "Macronix",
- .name = "MX25L25635F/MX25L25645E/MX25L25665E",
+ .name = "MX25L25635F",
.bustype = BUS_SPI,
.manufacture_id = MACRONIX_ID,
.model_id = MACRONIX_MX25L25635F,
.total_size = 32768,
.page_size = 256,
/* OTP: 512B total; enter 0xB1, exit 0xC1 */
- .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_ENTER,
- .tested = TEST_OK_PREW,
+ .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA,
+ .tested = TEST_UNTESTED,
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
.block_erasers =
{
{
.eraseblocks = { {4 * 1024, 8192} },
+ .block_erase = spi_block_erase_21,
+ }, {
+ .eraseblocks = { {4 * 1024, 8192} },
.block_erase = spi_block_erase_20,
}, {
.eraseblocks = { {32 * 1024, 1024} },
+ .block_erase = spi_block_erase_5c,
+ }, {
+ .eraseblocks = { {32 * 1024, 1024} },
.block_erase = spi_block_erase_52,
}, {
.eraseblocks = { {64 * 1024, 512} },
+ .block_erase = spi_block_erase_dc,
+ }, {
+ .eraseblocks = { {64 * 1024, 512} },
.block_erase = spi_block_erase_d8,
}, {
.eraseblocks = { {32 * 1024 * 1024, 1} },
@@ -8174,20 +8183,29 @@ const struct flashchip flashchips[] = {
.total_size = 65536,
.page_size = 256,
/* OTP: 512B total; enter 0xB1, exit 0xC1 */
- .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_ENTER,
- .tested = TEST_OK_PREW,
+ .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA,
+ .tested = TEST_UNTESTED,
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
.block_erasers =
{
{
.eraseblocks = { {4 * 1024, 16384} },
+ .block_erase = spi_block_erase_21,
+ }, {
+ .eraseblocks = { {4 * 1024, 16384} },
.block_erase = spi_block_erase_20,
}, {
.eraseblocks = { {32 * 1024, 2048} },
+ .block_erase = spi_block_erase_5c,
+ }, {
+ .eraseblocks = { {32 * 1024, 2048} },
.block_erase = spi_block_erase_52,
}, {
.eraseblocks = { {64 * 1024, 1024} },
+ .block_erase = spi_block_erase_dc,
+ }, {
+ .eraseblocks = { {64 * 1024, 1024} },
.block_erase = spi_block_erase_d8,
}, {
.eraseblocks = { {64 * 1024 * 1024, 1} },
@@ -9914,9 +9932,8 @@ const struct flashchip flashchips[] = {
.page_size = 256,
/* supports SFDP */
/* OTP: 64B total; read 0x4B, write 0x42 */
- .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP
- | FEATURE_4BA_ENTER_WREN | FEATURE_4BA_READ | FEATURE_4BA_WRITE,
- .tested = TEST_OK_PREW,
+ .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_WREN,
+ .tested = TEST_UNTESTED,
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
.block_erasers = {
@@ -9924,9 +9941,15 @@ const struct flashchip flashchips[] = {
.eraseblocks = { {4 * 1024, 8192} },
.block_erase = spi_block_erase_21,
}, {
+ .eraseblocks = { {4 * 1024, 8192} },
+ .block_erase = spi_block_erase_20,
+ }, {
.eraseblocks = { {64 * 1024, 512} },
.block_erase = spi_block_erase_dc,
}, {
+ .eraseblocks = { {64 * 1024, 512} },
+ .block_erase = spi_block_erase_d8,
+ }, {
.eraseblocks = { {32768 * 1024, 1} },
.block_erase = spi_block_erase_c7,
}
@@ -9948,9 +9971,8 @@ const struct flashchip flashchips[] = {
.page_size = 256,
/* supports SFDP */
/* OTP: 64B total; read 0x4B, write 0x42 */
- .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP
- | FEATURE_4BA_ENTER_WREN | FEATURE_4BA_READ | FEATURE_4BA_WRITE,
- .tested = TEST_OK_PREW,
+ .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_WREN,
+ .tested = TEST_UNTESTED,
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
.block_erasers = {
@@ -9958,9 +9980,15 @@ const struct flashchip flashchips[] = {
.eraseblocks = { {4 * 1024, 16384} },
.block_erase = spi_block_erase_21,
}, {
+ .eraseblocks = { {4 * 1024, 16384} },
+ .block_erase = spi_block_erase_20,
+ }, {
.eraseblocks = { {64 * 1024, 1024} },
.block_erase = spi_block_erase_dc,
}, {
+ .eraseblocks = { {64 * 1024, 1024} },
+ .block_erase = spi_block_erase_d8,
+ }, {
.eraseblocks = { {65536 * 1024, 1} },
.block_erase = spi_block_erase_c7,
}
@@ -14827,8 +14855,9 @@ const struct flashchip flashchips[] = {
/* supports SFDP */
/* OTP: 1024B total, 256B reserved; read 0x48; write 0x42, erase 0x44, read ID 0x4B */
/* FOUR_BYTE_ADDR: supports 4-bytes addressing mode */
- .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_ENTER_WREN | FEATURE_4BA_READ,
- .tested = TEST_OK_PREW,
+ .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_ENTER_WREN
+ | FEATURE_4BA_EXT_ADDR | FEATURE_4BA_READ | FEATURE_4BA_FAST_READ,
+ .tested = TEST_UNTESTED,
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
.block_erasers =
generated by cgit v1.2.3 (git 2.25.1) at 2024-09-29 21:08:05 +0000