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* ft2232_spi: reintroduce generic GPIOL controlMichael Niewöhner2021-10-042-9/+109
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reintroduces a reworked version of the GPIOL pin control first introduced in commit 3207844 (CB:49637), which was reverted in commit 6518cf3 (CB:55692) due to breakage. This change introduces a new argument `gpiolX` to allow use of the four GPIOL pins either as generic gpios or as additional CS# signal(s). `X` specifies the GPIOL pin (0-3) to be set to one of [HLC] with the following meaning: * H - set the pin as output high * L - set the pin as output low * C - use the pin as additional CS# signal The third value, `C`, aims to replace the parameter `csgpiol`, that is now marked as deprecated and can be removed at some point in the future. `gpiol` and `csgpiol` are mutually exclusive and use of both results in an error. Multiple pins may be set by specifying the parameter multiple times. Documentation was updated/added accordingly. Test: All pin levels/modes have been verified to behave correctly with a logic analyzer. Change-Id: I3989f0f9596c090de52dca67183b1363dae59d3a Signed-off-by: Alan Green <avg@google.com> Signed-off-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/57810 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* ich_descriptors: Add explicit checks for all chipsetsDavid Hendricks2021-10-011-10/+19
| | | | | | | | | | | | | | | | This partially undoes changes made in commit cd9b7b427 (ich_descriptors: Normalize chipset detection) to re-add explicit matching of each chipset with one or more strap length values. Since ranges are checked explicitly, the `warn_if` parameter to warn_peculiar_desc() is no longer necessary and is removed. Change-Id: Ica49477492876810a6fa212768b1ab9e8c12001f Signed-off-by: David Hendricks <ddaveh@amazon.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/57793 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Nico Huber <nico.h@gmx.de>
* flashrom.8: carve out `csgpiol` into its own sectionMichael Niewöhner2021-10-011-6/+11
| | | | | | | | | | | | Documentation for `csgpiol` was put into the generic programmer options section. Move it to its own section. Change-Id: Ic7379331d36b3068eacde5a983b4ccb3afc56c51 Signed-off-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/57893 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* ft2232_spi: prevent use of reserved pins on some programmersMichael Niewöhner2021-10-011-0/+12
| | | | | | | | | | | | | On some programmers an output buffer needs to be enabled by pulling a gpio high/low. This gpio can not be used for `csgpiol`. Prevent this by printing an error. Change-Id: Ied450fa5ef358153adefec3beabc63a62c9f60cd Signed-off-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/57809 Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* flashchips.c: mark EN25F10 as TEST_OK_PREWSimon Buhrow2021-10-011-1/+1
| | | | | | | | | | As reported by Wolf Dieter Brandt in his e-mail from 09.Aug.2021. Change-Id: I0c19f84780e7fa3699fd706f8e105fc5937ba8bf Signed-off-by: Simon Buhrow <simon.buhrow@posteo.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/58031 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* tests: Revise mock chip definition and usageAnastasia Klimchuk2021-10-011-117/+60
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch is doing few things: 1) Makes chip definitions static global so that they can be reused between test functions. 2) Promotes existing mock chip from 8KiB to 8MiB and eraseblocks are expanded accordingly. Old value of 8KiB was very small and it was confusing. Mock chip looks more realistic now. 3) Uses KiB and MiB macros from flash.h for mock chip definition 4) Renames CHIP_TOTAL_SIZE to MOCK_CHIP_SIZE to avoid confusion (there is also a W25Q128.V chip in the tests) 5) Makes chip definitions const so that every test can work on a fresh copy on the stack. BUG=b:181803212 TEST=builds and ninja test Change-Id: Ia9b5fc71e30610684e68e9aca9fb1970da8f840a Signed-off-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/57437 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* tests: Add tests to read from chipAnastasia Klimchuk2021-10-015-0/+146
| | | | | | | | | | | | | | | | | | | | Two tests cover the code which performs do_read operation. First one works with fake chip and dummy programmer. Fake chip has all operations defined, and a buffer to emulate chip memory. Second one uses the chip which is closer to the real one, because read/write/unlock/erase operations are real. The tests takes the advantage of dummyflasher's capability of emulating a W25Q128.V chip. BUG=b:181803212 TEST=builds and ninja test Change-Id: Ia57781ebc670c7bd6197e56fe8a20651a425c756 Signed-off-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/57326 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* tests: Extract setup and teardown for chip testsAnastasia Klimchuk2021-10-011-55/+47
| | | | | | | | | | | | | | | Steps to setup and teardown for a chip test are repeated for every test, so they can be extracted into their own functions. BUG=b:181803212 TEST=builds and ninja test Change-Id: If59315646f06344664df08b145866d9ce846d751 Signed-off-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/57436 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
* nicintel_spi.c: Implement `set_sck_set_mosi` and `set_sck_get_miso`Angel Pons2021-10-011-0/+27
| | | | | | | | | | | | Tested on a 8086:1533 (i210 GbE), reads still return the same data. This cuts the time to read a Winbond W25Q80.V (1 MiB, SPI) from 66 seconds down to 48 seconds, i.e. a 37.5% increase in speed. Change-Id: I52a0ae5ff331ee2ed41652eb5c2ed7ebe7253d74 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/49267 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* util/ich_descriptors_tool: Use GNU-style printf in MinGWDavid Hendricks2021-10-011-0/+4
| | | | | | | | | | | | | | This allows MinGW targets to use certain printf formatting identifiers such as "%v" by adding -D__USE_MINGW_ANSI_STDIO=1 to the CFLAGS. This is also done in flashrom's top-level Makefile. Reported on https://github.com/flashrom/flashrom/issues/149 Change-Id: I644be8b5b607cc77b4be2121c443f0d41d8da687 Signed-off-by: David Hendricks <david.hendricks@gmail.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/43052 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* ch341a: use better english in the debug messageThomas Heijligen2021-10-011-1/+1
| | | | | | | | | Change-Id: Ib7f15aa36fedc6af990c3ca45e81547cbfde24a1 Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/58037 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
* dediprog.c: Split up compound conditional and swap two operationsAngel Pons2021-10-011-3/+3
| | | | | | | | | | | | | | | | | register_spi_master now becomes the last operation in init function, which is consistent with other spi masters. In addition, the patch fixes propagation of register_spi_master return values, which is also consistent with other spi masters. TEST=ninja test Change-Id: Ib7e0179da39279e32a8497466b044b69ec836da8 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Signed-off-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/51706 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* internal.c: unify the macro for x86 only codeThomas Heijligen2021-09-291-7/+7
| | | | | | | | | | | | | | The #if defined(__i386__) || defined(__x86_64__) guard is commonly used for x86 only code across flashrom. Only platform.h and hwaccess.* use the IS_X86 macro. Change-Id: I94a599431f58666189c8cd601286e9b30c8bf62b Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/57942 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Felix Singer <felixsinger@posteo.net> Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* ch341a_spi: replace active kernel driver detaching by automatic oneThomas Heijligen2021-09-291-11/+4
| | | | | | | | | | | | Let libusb_claim_interface() handle the kernel driver detaching for us by allowing automatic kernel driver detachment. Allow this on all platforms. Change-Id: If6f19744503055ab8e22c863b31e696808e0407d Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/57889 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* Makefile: move functions and macros to own fileThomas Heijligen2021-09-282-197/+215
| | | | | | | | | | | | | Move all define statements in its own file to tidy up the main Makefile. Change-Id: I451f2eeab2773982e02b2f2fdc9e8abe1cc87630 Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/57935 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Felix Singer <felixsinger@posteo.net>
* custom_baud: move Linux specific code into own fileThomas Heijligen2021-09-284-47/+69
| | | | | | | | | | | Handle system specific code in an own file like i2c_helper_linux.c. The build system decides when to build it. Change-Id: I0744e769dcc6000483e7256105903a87e927ee77 Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/57990 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* os.h: remove unneeded includeThomas Heijligen2021-09-271-2/+0
| | | | | | | | | | | No symbol from platform.h is used in os.h Change-Id: Ia8f463ab8f9f064fe79f5ee0840b851ae497a080 Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/57936 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Singer <felixsinger@posteo.net> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* ft2232_spi: clarify the comment about gpio configurationMichael Niewöhner2021-09-261-2/+5
| | | | | | | | | | | | | The comment explaining gpio levels might be easily misunderstood when the reader misses the word `output`. Add an explicit description of handling of the GPIOL* pins to avoid that and make things even more clear. Change-Id: Iaceec889a65ead8cdde917f61b2a9695d440f781 Signed-off-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/57808 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* flashrom.8: add missing entry for `--flash-contents`Michael Niewöhner2021-09-261-0/+7
| | | | | | | | Change-Id: I64a8200a86329bd26a2069c5dc39430de9f8ba09 Signed-off-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/57807 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* flashrom.8: replace `svn changelog` with `git history`Michael Niewöhner2021-09-261-1/+1
| | | | | | | | | Change-Id: If8659dd603cbabdb8e20d89f818072986373e24f Signed-off-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/57811 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* remove compile guardsThomas Heijligen2021-09-2618-83/+0
| | | | | | | | | | | | | The build system handles the decision when to build a file. Extra compile guards for the source files are not necessary. Change-Id: I76a76e05c7a7dd27637325ab1e9d8946fd5f9076 Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/57797 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Singer <felixsinger@posteo.net> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Nico Huber <nico.h@gmx.de>
* mec1308: remove MEC1308 EC programmerVictor Ding2021-09-229-602/+2
| | | | | | | | | | | | | | | | | Best efforts were made to upstream older Chromebook support for good intentions for folks interested. However, we no longer have the hardware available to test and maintain the code as the hardware is now end of life. Therefore the code state has sadly fallen into a unknown state. BUG=none BRANCH=none TEST=builds and ninja test passes Signed-off-by: Victor Ding <victording@google.com> Change-Id: I535b6380846734c999474519e9e60a73eb6a2ec4 Reviewed-on: https://review.coreboot.org/c/flashrom/+/56476 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* ene_lpc: remove ENE LPC programmerVictor Ding2021-09-229-681/+3
| | | | | | | | | | | | | | | | | Best efforts were made to upstream older Chromebook support for good intentions for folks interested. However, we no longer have the hardware available to test and maintain the code as the hardware is now end of life. Therefore the code state has sadly fallen into a unknown state. BUG=none BRANCH=none TEST=builds and ninja test passes Signed-off-by: Victor Ding <victording@google.com> Change-Id: I3f40db22c42c04ce029c4defd837e05ebb550c9b Reviewed-on: https://review.coreboot.org/c/flashrom/+/56475 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* dediprog.c: Drop dediprog_ prefix for spi data struct membersAnastasia Klimchuk2021-09-131-60/+54
| | | | | | | | | | | | | | The name of the struct type already contains dp_ prefix, so prefix doesn't need to be repeated in members name. BUG=b:185191942 TEST=builds and ninja test Change-Id: I688d50926b78a6c3f1c5a8ba4ef88a0d5b495bd0 Signed-off-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/56415 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* dediprog.c: Refactor singleton states into reentrant patternAnastasia Klimchuk2021-09-131-112/+150
| | | | | | | | | | | | | | | | | | Move global singleton states into a struct and store within the spi_master data field for the life-time of the driver. This is one of the steps on the way to move spi_master data memory management behind the initialisation API, for more context see other patches under the same topic "register_master_api". BUG=b:185191942 TEST=builds and ninja test Change-Id: I72085e750af97b94dfa94f2ebf2a134e41a2ec8d Signed-off-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/56414 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* chipset_enable.c: Mark Z97 as DEPSophie van Soest2021-09-131-1/+1
| | | | | | | | | | | Tested on GIGABYTE GA-Z97-HD3. Signed-off-by: Sophie van Soest <sophie@entropie.rocks> Change-Id: I73bdd9afefae8e7c013d400e17a15e56d84322f4 Reviewed-on: https://review.coreboot.org/c/flashrom/+/56060 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
* ich_descriptors_tool: Add missing Comet Point in usageMichał Żygowski2021-09-121-0/+1
| | | | | | | | Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com> Change-Id: Ia1e3e231944513521d5db064340a0247f1884290 Reviewed-on: https://review.coreboot.org/c/flashrom/+/55993 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* ni845x_spi: add missing const specifier to the spi_transmit functionMiklós Márton2021-09-061-1/+1
| | | | | | | | | | Change-Id: I2c14361283b2da3725d9ba2cae0e1007e6be3d66 Signed-off-by: Miklós Márton <martonmiklosqdev@gmail.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/57003 Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* Add support for Intel Emmitsburg PCHJonathan Zhang2021-09-012-0/+3
| | | | | | | | | | | | | | | | | | | | This patch does the following: - Add PCIe ID for Intel Emmitsburg PCH - Based on ICH descriptor content, choose CHIPSET_C620_SERIES_LEWISBURG if ISL/PSL is 80. TESTED=tried on a server with Intel Emmitsburg PCH, flash update was successful. This server, however, does not have flash chip installed, it instead has em100 emulator connected. Change-Id: I2a1bb7467e693d1583aa885fa0e277075edd4a3e Signed-off-by: Jonathan Zhang <jonzhang@fb.com> Signed-off-by: David Hendricks <ddaveh@amazon.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/54965 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Christian Walter <christian.walter@9elements.com> Reviewed-by: Johnny Lin <Johnny_Lin@wiwynn.com> Reviewed-by: Tim Chu <Tim.Chu@quantatw.com>
* tests: Mock file i/o for linux_mtd and linux_spi testsAnastasia Klimchuk2021-08-305-4/+180
| | | | | | | | | | | | | | | | | | | | | | | | This patch adds an init-shutdown test for linux_mtd. Since linux_mtd is using file i/o operations, those are added to the framework and mocked. Another driver linux_spi which is also using file i/o, got an upgrade in this patch, and it is now reading max buffer size from sysfs (using mocked file i/o). A good side-effect is that linux_mtd is the first test for opaque masters, which is great to have in preparation for a change like CB:56103 but for opaque masters. BUG=b:181803212 TEST=builds and ninja test Change-Id: I73f0d6ff2ad5074add7a721ed3416230d3647e3f Signed-off-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/56413 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
* par_master: Fix propagation of register_par_master() return valuesAnastasia Klimchuk2021-08-3010-28/+10
| | | | | | | | | | | | | | | This patch checks return value of register_par_master() so that in case of an error this error is not ignored anymore. BUG=b:185191942 TEST=builds and ninja test Change-Id: I377afae41708c7433a56615e2f096bce9c5349f1 Signed-off-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/57192 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Nico Huber <nico.h@gmx.de>
* par_master: Use new API to register shutdown functionAnastasia Klimchuk2021-08-302-15/+4
| | | | | | | | | | | | | | | | | | This allows par masters to register shutdown function in par_master struct, which means there is no need to call register_shutdown in init function, since this call is now a part of register_par_master. As a consequence of using new API, this patch also fixes propagation of register_par_master() return values. BUG=b:185191942 TEST=builds and ninja test Change-Id: Ief7be907f53878b4b6567b52889735e5fff64ead Signed-off-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/57156 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* par_master: Move shutdown function above par_master structAnastasia Klimchuk2021-08-302-18/+18
| | | | | | | | | | | | | | | | | | This patch prepares par masters to use new API which allows to register shutdown function in par_master struct. See also later patch in this chain, where par masters are converted to new API. BUG=b:185191942 TEST=builds and ninja test Comparing flashrom binary before and after the patch, make clean && make CONFIG_EVERYTHING=yes VERSION=none binary is the same Change-Id: I87e9ce0ad9b39b39645dc24cb0d75d1e7a6d9047 Signed-off-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/57155 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
* par_master: Add shutdown function in par_master structAnastasia Klimchuk2021-08-302-0/+8
| | | | | | | | | | | | | | | | | | With this, register_par_master can take care of register_shutdown as well, and every par master only needs to call register_par_master instead of calling both register_par_master and register_shutdown. Next patches in the chain convert par masters to use new API. BUG=b:185191942 TEST=builds and ninja test Change-Id: I0fee15d548cdd16678e551eeb351e659812ddf76 Signed-off-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/57154 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
* ni845x_spi: handle PROGRAMFILES(X86) env var properlyMiklós Márton2021-08-271-2/+11
| | | | | | | | | | | | | | | | | The PROGRAMFILES(X86) envvar contains brackets which could not be interpreted by the Makefile's interpreter. A sed based tweak have been added to extract the variable value from the env command output. The prefixed include and linker path with this (now correctly extracted) prefix only added to the compilation flags if it differ from the PROGRAMFILES variable. Change-Id: I397619a5038567d649a417ce6b9d8ac9e1c8c67b Signed-off-by: Miklós Márton <martonmiklosqdev@gmail.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/56636 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Nico Huber <nico.h@gmx.de>
* spi_master: Use new API to register shutdown functionAnastasia Klimchuk2021-08-2521-112/+40
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This allows spi masters to register shutdown function in spi_master struct, which means there is no need to call register_shutdown in init function, since this call is now a part of register_spi_master. As a consequence of using new API, two things are happening here: 1) No resource leakage anymore in case register_shutdown() would fail, 2) Fixed propagation of register_spi_master() return values. Basic testing: when I comment out free(data) in linux_spi_shutdown, test fails with error ../linux_spi.c:235: note: block 0x55a4db276510 allocated here ERROR: linux_spi_init_and_shutdown_test_success leaked 1 block(s) Means, shutdown function is invoked. BUG=b:185191942 TEST= 1) builds and ninja test including CB:56911 2) On ARMv7 device flashrom -p linux_spi -V -> using linux_spi, chip found 3) On x86_64 AMD device flashrom -p internal -V -> this is actually using sb600spi, chip found Change-Id: Ib60300f9ddb295a255d5ef3f8da0e07064207140 Signed-off-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/56103 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
* opaque_master: Use new API to register shutdown functionAnastasia Klimchuk2021-08-252-15/+5
| | | | | | | | | | | | | | | | | | | | | | | This allows opaque masters to register shutdown function in opaque_master struct, which means there is no need to call register_shutdown in init function, since this call is now a part of register_opaque_master. As a consequence of using new API, two things are happening here: 1) No resource leakage anymore in case register_shutdown() would fail, 2) Fixed propagation of register_opaque_master() return values. BUG=b:185191942 TEST=1) builds and ninja test including CB:56413 2) on ARMv7 device flashrom -p linux_mtd -V -> using linux_mtd, chip found Change-Id: Id8471a117556edcbf9694752fabe05cf4501ce70 Signed-off-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/56825 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
* flashchips: Add MX25L12833FTao Xia2021-08-242-3/+3
| | | | | | | | | | | | Just add the name to the existing entry, as usual it is supposed to be compatible. Signed-off-by: Tao Xia <xiatao5@huaqin.corp-partner.google.com> Change-Id: I14ab7e04f5209d2bcf34b0d2de9da2c01bf32d00 Reviewed-on: https://review.coreboot.org/c/flashrom/+/56546 Reviewed-by: Weimin Wu <wuweimin@huaqin.corp-partner.google.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* flashchips.c: Add 'GD25LQ128E' to match C and D variantsEdward O'Callaghan2021-08-241-1/+1
| | | | | | | | | | | | | | | | | As defined by gigadevice. C, D and E are all meant to be the same. BUG=b:185957191 BRANCH=none TEST=builds Change-Id: I3bef9386a185a0e8c54c125af5509b63540995aa Signed-off-by: Edward O'Callaghan <quasisec@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/55742 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nikolai Artemiev <nartemiev@google.com> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* tests: Add tests to erase a chipAnastasia Klimchuk2021-08-194-0/+237
| | | | | | | | | | | | | | | | | | | | Two tests cover the code which performs do_erase operation. First one works with fake chip and dummy programmer. Fake chip has all operations defined, and a buffer to emulate chip memory. Second one uses the chip which is closer to the real one, because read/write/unlock/erase operations are real. The tests takes the advantage of dummyflasher's capability of emulating a W25Q128.V chip. BUG=b:181803212 TEST=builds and ninja test Change-Id: I6f74bfe4e02244d24d6c837cc3d551251e7b4898 Signed-off-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/56501 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
* tests: Use real spi_send_command for all tests except spi25.cAnastasia Klimchuk2021-08-191-13/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | At the moment one test (spi25.c) uses wrap of spi_send_command, and all other existing tests don't care about this function (don't call it at all). However in the next patch a new test in introduced, which needs a real spi_send_command. Following the approach "don't mock unless it is strictly necessary", all tests that don't care go into real function bucket. A declaration for __real_spi_send_command is needed for visibility, this way wrap function can redirect to real function for all other tests except spi25.c. Additionally, wrap function moves below mock_chip, so that mock_chip is visible inside wrap. BUG=b:181803212 TEST=builds and ninja test Change-Id: I22945cce3d0f36adaa8032167a3ef4e54eccb611 Signed-off-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/56753 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
* tests: add init_shutdown test for realtek_mst_i2c_spiPeter Marheine2021-08-195-0/+100
| | | | | | | | | | | | | | | | This can catch regressions like the earlier one in this programmer that caused initialization to always fail. Requires support for mocking POSIX file I/O functions because the programmer does ioctls on the opened file. TEST=ninja test Signed-off-by: Peter Marheine <pmarheine@chromium.org> Change-Id: I5a5c617d1ec35d2a3bbe622e5add82a65eb396f0 Reviewed-on: https://review.coreboot.org/c/flashrom/+/56911 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
* opaque_master: Move shutdown function above opaque_master structAnastasia Klimchuk2021-08-172-25/+25
| | | | | | | | | | | | | | | | | | This patch prepares opaque masters to use new API which allows to register shutdown function in opaque_master struct. See also later patch in this chain, where opaque masters are converted to new API. BUG=b:185191942 TEST=builds and ninja test Comparing flashrom binary before and after the patch, make clean && make CONFIG_EVERYTHING=yes VERSION=none binary is the same Change-Id: I5000cfceeba859a76177a17c1cb7d1c1e9fc03fe Signed-off-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/56824 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
* opaque_master: Add shutdown function in opaque_master structAnastasia Klimchuk2021-08-172-0/+8
| | | | | | | | | | | | | | | | | | With this, register_opaque_master can take care of register_shutdown as well, and every opaque master only needs to call register_opaque_master instead of calling both register_opaque_master and register_shutdown. Next patches in the chain convert opaque masters to use new API. BUG=b:185191942 TEST=builds and ninja test from CB:56413 Change-Id: I34183e6bafc787eec54ee4a26b73a40803f3ce99 Signed-off-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/56823 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
* linux_mtd: Free param right after its last usageAnastasia Klimchuk2021-08-171-4/+6
| | | | | | | | | | | | | | | | | Param is only used in the first half of init function, and it is local, so there is no need to keep it until the end. This makes handling error paths in the second half of init function shorter, because those paths can just return 1 instead of going to a label. BUG=b:185191942 TEST=builds and ninja test from CB:56413 Change-Id: I126a8d06297ef4d42bc93a73f7067ccc1352d1e9 Signed-off-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/56822 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* nicintel_eeprom: Check UNPROG_DEVICE in 82580 shutdownAnastasia Klimchuk2021-08-171-14/+24
| | | | | | | | | | | | | | | | | | | | | | | | | Previously shutdown function was registered conditionally for 82580, only if the device was not UNPROG_DEVICE. This patch moves the check for UNPROG_DEVICE into shutdown function itself, so that shutdown function can be always registered for 82580. This also fixes a memory leak in nicintel_ee_shutdown_82580. No changes for i210 device init/shutdown, only for 82580. And very importantly this unlocks API change which plans to move register_shutdown inside register_opaque_master, similar to what's done in CB:56103 BUG=b:185191942 TEST=builds Change-Id: I5c729a3a63d0106e65525a6a77b2f9104c96847f Signed-off-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/56821 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
* nicintel_eeprom: Delete extra parentheses from if conditionAnastasia Klimchuk2021-08-171-1/+1
| | | | | | | | | | | | BUG=185191942 TEST=builds Change-Id: I068bd227668a79f14e38e703a5a49db18d5de8c7 Signed-off-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/56820 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
* spi_master: Move shutdown function above spi_master structAnastasia Klimchuk2021-08-1714-188/+184
| | | | | | | | | | | | | | | | | | | This patch prepares spi masters to use new API which allows to register shutdown function in spi_master struct. See also later patch in this chain, where spi masters are converted to new API. BUG=b:185191942 TEST=builds and ninja test Comparing flashrom binary before and after the patch, make clean && make CONFIG_EVERYTHING=yes VERSION=none binary is the same Change-Id: I50716686552b4ddcc6089d5afadb19ef59d9f9b4 Signed-off-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/56101 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* spi_master: Add shutdown function in spi_master structAnastasia Klimchuk2021-08-172-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | With this, register_spi_master can take care of register_shutdown as well, and every spi master only needs to call register_spi_master instead of calling both register_spi_master and register_shutdown. Testing: In dummyflasher, comment out free(data) in shutdown. Test fails with error: ../dummyflasher.c:949: note: block 0x55e0727a6e40 allocated here ERROR: dummy_init_and_shutdown_test_success leaked 1 block(s) Means, shutdown function is invoked for drivers with "old" API (so, transitioning from old to new API is not breaking anything). Next patches in the chain converts spi masters to use new API. BUG=b:185191942 TEST=builds and ninja test Change-Id: I2dc80dceca2f8204bcd0dad1f51753d7e79f1af5 Signed-off-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/55932 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* realtek_mst_i2c_spi: don't always fail initPeter Marheine2021-08-101-1/+1
| | | | | | | | | | | | | | | | | | In some earlier refactoring the init function for this programmer was broken such that it never succeeds, since the return value was never set to a value other than a generic failure. Fix it to return success unless there is a problem. TEST=flashrom -p realtek_mst_i2c_spi:bus=n --flash-size now works when n is a bus that has a connected MST. Change-Id: I0596014fc9b76b4d11de230f9f5c414c1321dff1 Signed-off-by: Peter Marheine <pmarheine@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/56799 Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
generated by cgit v1.2.3 (git 2.25.1) at 2024-07-05 00:53:57 +0000