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* MAINTAINERS: Add Anastasia Klimchuk for sphinx docsHEADmasterAnastasia Klimchuk2023-04-291-0/+1
| | | | | | | | Change-Id: Ia05bde6bd2fecb5af8a9b8868fd15faaad50d899 Signed-off-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/74227 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Thomas Heijligen <src@posteo.de>
* MAINTAINERS: Add Thomas Heijligen for sphinx docsAnastasia Klimchuk2023-04-291-0/+5
| | | | | | | | Change-Id: Ic97df0f118c8a10762df54467051eabb63e309a7 Signed-off-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/74226 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Thomas Heijligen <src@posteo.de>
* doc: Add contact pageThomas Heijligen2023-04-272-0/+144
| | | | | | | | | | | This is just a copy of https://www.flashrom.org/Contact. Change-Id: Ibfba6a59c5a945b4238d16e07a07584f94159568 Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/73822 Reviewed-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* doc: Convert build documentation to sphinxThomas Heijligen2023-04-275-148/+271
| | | | | | | | | | | | | | | | | | | | These build instructions are mostly based on `Documentation/building.md` and the wiki. There are some `.. todo::` sections still present in the documentation. They will be completed later. For some of the todos content needs to be written, some others require custom sphinx-plugins to be implemented. The `.. todo::` sections are only visible in the source, not in the rendered html. Change-Id: I96771e98b313a6d26dd2be940ff37998d4124324 Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/73359 Reviewed-by: Alexander Goncharov <chat@joursoir.net> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* meson_cross: Introduce meson cross file for DJGPP/DOSThomas Heijligen2023-04-271-0/+29
| | | | | | | | | | | | With `meson setup --cross-file meson_cross/i586_djgpp_dos.txt builddir` you can build flashrom as DOS executable. Change-Id: Iabda73942c1e64cd46604c78533982374f78e1a4 Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/73439 Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* meson.build: Add 'dos' as option for pci_based programmerThomas Heijligen2023-04-271-1/+1
| | | | | | | | | Change-Id: If4907a3fd1852ef60d06ef1625ad8a106d89a126 Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/73156 Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* printf: Use inttype.h macros for format stringsThomas Heijligen2023-04-2722-238/+239
| | | | | | | | | | | | | | DJGPP for compiling DOS has other sizes for the normal int types and therefore throwing errors when using %i %d or %x with uint32_t. Fix these warnings by using the macros created for it and provided in inttypes.h. Change-Id: Ia75b6df981ce60c891161fe553c7ceab8570178d Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/73040 Reviewed-by: Anastasia Klimchuk <aklm@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* cli_classic: include a fallback inplementation of getoptThomas Heijligen2023-04-274-6/+319
| | | | | | | | | | | | Some systems, DJGPP/DOS for now, may not provide getopt and their gnu extensions. So provide a fallback implementation. The code is based on musl libc. Change-Id: I6ebbde075014e3b45b0f9e04b34b72aa969e1197 Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/73102 Reviewed-by: Anastasia Klimchuk <aklm@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* tests: Emulate multithreading environment for unit testsAnastasia Klimchuk2023-04-272-12/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The main purpose of this patch is to run unit tests on BSD family of OSes. The root cause is `fileno` syscall which is a macro that can be expanded to either a function call (for multi-threaded environment) or to inline code (for single-threaded environment). Said inline code accesses private field of file descriptor, and this construction is impossible to mock in unit tests. Multi- threaded environment has `fileno` as a function, which can be mocked in unit tests. On other OSes the patch just creates a thread which is doing nothing. We avoid adding pre-processor conditionals since the cost is small. Tested on FreeBSD 13.1-RELEASE-p6 GENERIC amd64 NetBSD 9.2 (GENERIC) amd64 OpenBSD 7.2 GENERIC#7 amd64 DragonFly v6.4.0-RELEASE x86_64 Ubuntu 22.04.1 x86_64 Change-Id: I3d65c125183e60037ad07b9d54b8fffdece5a4e8 Signed-off-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/74157 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Peter Marheine <pmarheine@chromium.org> Reviewed-by: Thomas Heijligen <src@posteo.de>
* chipset_enable: Mark Intel H97 as test_state DEPThomas Heijligen2023-04-241-1/+1
| | | | | | | | | | | | | | | An user reported on the mailing list [0] a successfull update of an MSI MS-7850 mainboard with an Intel H97 chipset. All ME-enable chipsets are marked as DEP instead of OK, so follow this rule. [0] https://mail.coreboot.org/hyperkitty/list/flashrom@flashrom.org/message/MYU5ZPLDRYWWNEFWN3RSOVX3VA5HPH42 Change-Id: Iebf83b5b226d961bd5a6b5f53693dbc5f8884898 Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/73581 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* flashrom: rewrite flashbuses_to_text()Alexander Goncharov2023-04-244-23/+54
| | | | | | | | | | | | | | | | | | | | | | The previous implementation had no error handling, as a result the flashrom could crash if the computer ran out of memory. The new version returns NULL in such cases. Also, rewrite lots of `if` conditions to one cycle, store a name of buses and `enum chipbustype` in an array by using a custom struct. The caller always expected a non-null value, so change its behavior to handle a possible null value or use the `?` symbol. As far as `free()` can handle null pointers, do nothing with such callers. TEST=ninja test Change-Id: I59b9044c99b4ba6c00d8c97f1e91af09d70dce2c Signed-off-by: Alexander Goncharov <chat@joursoir.net> Ticket: https://ticket.coreboot.org/issues/408 Reviewed-on: https://review.coreboot.org/c/flashrom/+/73039 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
* tests: Fix mode_t argument conversion for va_argAnastasia Klimchuk2023-04-241-9/+9
| | | | | | | | | | | | | | | | | | | | Patch fixes the error: error: second argument to 'va_arg' is of promotable type 'mode_t' (aka 'unsigned short'); this va_arg has undefined behavior because arguments will be promoted to 'int' [-Werror,-Wvarargs] Discovered and tested on: FreeBSD clang version 13.0.0 gcc 8.3.0 "cc 8.3 [DragonFly] Release/2019-02-22" Also tested on: gcc 11.3.0 "cc (Ubuntu 11.3.0-1ubuntu1~22.04) 11.3.0" Change-Id: I95b7c8dafdf4e7664c48a952acd7f8eaedb59ba7 Signed-off-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/74202 Reviewed-by: Peter Marheine <pmarheine@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Thomas Heijligen <src@posteo.de>
* usb_device.c: remove LIBUSB() wrapper around call that may failNikolai Artemiev2023-04-231-2/+2
| | | | | | | | | | | | | | | | | | | | The libusb_detach_kernel_driver() call may return LIBUSB_ERROR_NOT_FOUND, which should not be treated as an error. Wrapping the call in LIBUSB() caused the error code to be transformed by LIBUSB_ERROR(), so LIBUSB_ERROR_NOT_FOUND was not recognized at the call site and was treated as a real error. BUG=b:278635575 TEST=flashrom -p raiden_debug_spi:target=AP BRANCH=none Change-Id: I38e4642bcbddaf3f37821093f6b919806134ed7b Signed-off-by: Nikolai Artemiev <nartemiev@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/74537 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Thomas Heijligen <src@posteo.de> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
* meson.build: Use library() to build libflashromThomas Heijligen2023-04-201-3/+12
| | | | | | | | | | | | | | Use library() instead of both_libraries() to build libflashrom. The built-in option `default-library` can be used to decide which kind of libraries should be built. Make `both` the default and throw an error in the case someone tries to build the classic_cli with a shared library. Change-Id: I27f10fdf1227795a9a3b4e050a2d708b58f10ee7 Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/73101 Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* layout.c: Ensure filename is always consistent in layout structureEdward O'Callaghan2023-04-131-8/+11
| | | | | | | | | | | | Ensure construction and extraction filenames are symmetrical consistently within the layout structure. Change-Id: I9a0c3130c0e7d88a8a69fd29362c338e20d2bae8 Signed-off-by: Edward O'Callaghan <quasisec@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/72943 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
* buspirate: Add option for setting the aux pinSean Anderson2023-04-132-2/+28
| | | | | | | | | | | | | This adds a parameter to drive the aux pin low (or high if you explicitly want the previous behavior). Some boards need to have a reset pin driven low before the firmware can be safely flashed. With the Bus Pirate, this is most easily done with the auxiliary pin. Change-Id: Ieeecfdf1afc06dadda9b8f99547cd74854ca6775 Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/43608 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Thomas Heijligen <src@posteo.de>
* ch341a_spi: drop validation of handle in routinesAlexander Goncharov2023-04-131-10/+0
| | | | | | | | | | | | | Since the handle is no longer a global variable and only exists during the lifetime of the driver, we can stop checking if the handle equals NULL. Change-Id: I1872495b83a522ceced331fef35d9d9d3b43fce5 Signed-off-by: Alexander Goncharov <chat@joursoir.net> Reviewed-on: https://review.coreboot.org/c/flashrom/+/72808 Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
* ch341a_spi: Refactor singleton states into reentrant patternAlexander Goncharov2023-04-131-75/+81
| | | | | | | | | | | | | | | | | | | | | | | | | | | Move global singleton states into a struct and store within the spi_master data field for the life-time of the driver. This patchset also includes stdlib.h to be able to work with memory allocation. Pass programmer's data as a parameter to functions that need it. This is one of the steps on the way to move spi_master data memory management behind the initialisation API, for more context see other patches under the same topic specified below. TOPIC=register_master_api TEST=Tested on flash W25Q128JVSQ flashrom -E # Result: success flashrom -v ff.bin # Result: verified flashrom -w firmware.bin # Result: success flashrom -v firmware.bin # Result: verified Change-Id: I9fe72bff88b7f8778c1199bdab8ba43bf32e1c8c Signed-off-by: Alexander Goncharov <chat@joursoir.net> Ticket: https://ticket.coreboot.org/issues/391 Reviewed-on: https://review.coreboot.org/c/flashrom/+/72807 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
* cli_classic: refactor arguments parsing into separate funcAlexander Goncharov2023-04-131-245/+270
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move variables that represent parsed options to `cli_options` structure. This patchset also introduces the following functions: - parse_options() which parses command line arguments and fills the structure. - free_options() that releases an allocated data from the structure. This is one of the steps on the way to simplify the main function by using helper functions with descriptive names. TOPIC=split_main_func TEST=the following scenarious run successfully ./flashrom -p dummy:emulate=S25FL128L -V ./flashrom -p dummy:size=8388608,emulate=VARIABLE_SIZE \ -r /tmp/dump.rom ./flashrom -p dummy:emulate=W25Q128FV -l /tmp/rom.layout \ -i boot -w /tmp/rom.tr.img ./flashrom -p dummy:emulate=W25Q128FV --wp-list ./flashrom -p dummy:emulate=W25Q128FV,hwwp=yes \ --wp-enable \ --wp-range=0x00c00000,0x00400000 \ --wp-status $ head -c 16MiB </dev/urandom >/tmp/image.rom ./flashrom -p dummy:image=/tmp/image.rom,emulate=S25FL128L \ -c S25FL128L -E -V Change-Id: Id573bc74e3bb46b7dc42f1452fff6394d4f091bc Signed-off-by: Alexander Goncharov <chat@joursoir.net> Reviewed-on: https://review.coreboot.org/c/flashrom/+/66343 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
* usb_device.c: detach/attach usb kernel driver explicitlyThomas Heijligen2023-04-121-3/+9
| | | | | | | | | | | | | | | | Use `libusb_detach_kernel_driver` and `libusb_attach_kernel_driver` instead of `libusb_auto_detach_kernel_driver` to be compatible with older libusb versions without changing the behavior. TEST=Build with libusb >= 1.0.9 Change-Id: I1363fea13368b7ac1e9a3829864d06d123c4e157 Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/67073 Reviewed-by: Peter Marheine <pmarheine@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
* MAINTAINERS: Remove Felix SingerFelix Singer2023-04-061-11/+0
| | | | | | | | | | | | | I haven't worked on flashrom in the last months and I'm also not planning to continue working on it again. So I'm removing myself from the maintainers file since I'm not maintaining anymore. Items, which become unmaintained, are removed. Change-Id: I33903c4e38a24e6bf3cb233d28b297d1fa3716a9 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/flashrom/+/74274 Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* tree/: Case write_granularity enum valuesEdward O'Callaghan2023-04-065-41/+41
| | | | | | | | Change-Id: Ic8c655225abe477c1b618dc685b743e691c16ebd Signed-off-by: Edward O'Callaghan <quasisec@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/74165 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* internal: Move laptop_ok into board_cfgEdward O'Callaghan2023-04-065-44/+45
| | | | | | | | | | | | | | | | | | | | | | Due to how internal is structured around chipset_flash_enable() entry we need to prepare a crafted programmer_cfg that contains a board_enable substructure with data derived from the board_enable subsystem. While this is certainly not perfection, it does make clear the relationships between board_enable into chipset_flash_enable and subsequently the overall internal programmer initialisation in a RAII fashion at the type level over closure upon global state that is impossible to reason about. Also flip predicate in report_nonwl_laptop_detected() and return early with the trivial base-case. TEST=`$ sudo ./flashrom -p internal --flash-name`. Change-Id: I459215253845c2af73262943ce91a36464e9eb06 Signed-off-by: Edward O'Callaghan <quasisec@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/73456 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Sam McNally <sammc@google.com>
* internal: Move is_laptop into board_cfgEdward O'Callaghan2023-04-023-9/+8
| | | | | | | | Change-Id: I24e38e4457299934acdcd70325d0bf0f4b139e5f Signed-off-by: Edward O'Callaghan <quasisec@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/73455 Reviewed-by: Sam McNally <sammc@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* board_enables: Allow for prog cfg coupling with board cfgEdward O'Callaghan2023-04-024-89/+96
| | | | | | | | | | | | | | Some boards need to configure the programmer in specific ways. For example, a programmer such as internal may need to be configured either as laptop or not type and as such the board enable needs the ability to feed state back into the programmer configuration. Plumb this though by creating a board_cfg structure that can be packed. Change-Id: I7058a693e714a6966a842ae97cc8da7296e63e5e Signed-off-by: Edward O'Callaghan <quasisec@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/71623 Reviewed-by: Sam McNally <sammc@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* board_enable.c: Consistent board_flash_enable() nullarity checksEdward O'Callaghan2023-03-281-4/+4
| | | | | | | | | | | | Use a consistent style, as is the case in the Linux kernel, of the canonical form of nullarity checking. Thus, making the function have a overall consistent style. Change-Id: Id28b8b70d9ecc9f69a1b61684500d9c6023ca045 Signed-off-by: Edward O'Callaghan <quasisec@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/73454 Reviewed-by: Thomas Heijligen <src@posteo.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* board_enable.c: Clean up board_handle_phase()Edward O'Callaghan2023-03-281-6/+1
| | | | | | | | | | | The board_enable_safetycheck() call already checks nullarity of the function pointer. Change-Id: I956961ee7204d3a6a9066ba5945f95af1411e700 Signed-off-by: Edward O'Callaghan <quasisec@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/73453 Reviewed-by: Thomas Heijligen <src@posteo.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* dmi.c: Pass is_laptop by ref into dmiEdward O'Callaghan2023-03-284-31/+31
| | | | | | | | | | | Prefix the remaining global cases with `g_` to avoid shadowing issues and for easy greping. Change-Id: I3d5ad6c0623269492d775a99a947fd6fe26c5f91 Signed-off-by: Edward O'Callaghan <quasisec@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/71622 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Sam McNally <sammc@google.com>
* tree/: Rename 'laptop_ok-> g_laptop_ok' to avoid shadowingEdward O'Callaghan2023-03-284-12/+12
| | | | | | | | | | Avoid global symbol shadowing in local functions. Change-Id: Idfca0b7e46d8051bf680227250cf40483e19dc53 Signed-off-by: Edward O'Callaghan <quasisec@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/73646 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Sam McNally <sammc@google.com>
* flashchips: Add Macronix MX25V1635F supportPoroCYon2023-03-262-0/+36
| | | | | | | | | | | | | | | See https://www.mxic.com.tw/Lists/Datasheet/Attachments/8662/MX25V1635F,%202.5V,%2016Mb,%20v1.4.pdf . I've tested this patch with the MX25V1635F I have here, using serprog and ftdi by (re)writing a few images to the flash and seeing if changes were stored correctly. This also included erasing and rewriting the memory with completely different data, so erase is tested, too. Change-Id: I58ddaaa96ef410d50dde3aaa20376c5bbf0f370b Signed-off-by: PoroCYon <p@pcy.be> Reviewed-on: https://review.coreboot.org/c/flashrom/+/73824 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
* flashchips: Add Macronix MX25V8035F supportPoroCYon2023-03-262-0/+36
| | | | | | | | | | | | | | | See https://www.macronix.com/Lists/Datasheet/Attachments/8405/MX25V8035F,%202.5V,%208Mb,%20v1.0.pdf . I've only tested this patch with the MX25V1635F I have here, though other chips in the series exist as well. Tested using serprog and ftdi by writing a few images to the flash and seeing if changes were stored correctly. Change-Id: Ic5be2da4cfa2a2ff044a519bb6f367f21c15e4b8 Signed-off-by: PoroCYon <p@pcy.be> Reviewed-on: https://review.coreboot.org/c/flashrom/+/73823 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
* flashchips: Add Macronix MX25V4035F supportPoroCYon2023-03-262-0/+37
| | | | | | | | | | | | | | | See https://www.macronix.com/Lists/Datasheet/Attachments/8670/MX25V4035F,%202.5V,%204Mb,%20v1.2.pdf . I've only tested this patch with the MX25V1635F I have here, though other chips in the series exist as well. Tested using serprog and ftdi by writing a few images to the flash and seeing if changes were stored correctly. Change-Id: I8b26926c354b840ca7b14b4c5cb000e3c02f5137 Signed-off-by: PoroCYon <p@pcy.be> Reviewed-on: https://review.coreboot.org/c/flashrom/+/73582 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
* MAINTAINERS: Re-order programmer entries alphabeticallyAnastasia Klimchuk2023-03-241-5/+5
| | | | | | | | | Change-Id: I7e9013fd4cd3b9ea6ecdb45fabbc3c57c4076a17 Signed-off-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/73965 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Miklós Márton <martonmiklosqdev@gmail.com>
* tree/: Convert printlock func ptr into enumerate valuesEdward O'Callaghan2023-03-224-97/+135
| | | | | | | | | | | | | | | | | | | Converting the printlock function pointer within the flashchip struct into enum values allows for the flashchips db to be turn into pure, declarative data. A nice side-effect of this is to reduce link-time symbol space of chipdrivers and increase modularity of the spi25_statusreg.c and related implementations. BUG=none TEST=ninja test. Change-Id: I9131348f72c1010e2c213dca4dc4b675a8d8681e Signed-off-by: Edward O'Callaghan <quasisec@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/69934 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Sam McNally <sammc@google.com> Reviewed-by: Nikolai Artemiev <nartemiev@google.com>
* Revert "pcidev: remove pcidev_getdevfn() function"Thomas Heijligen2023-03-203-2/+10
| | | | | | | | | | | | | | | As Edward pointed out correctly this function does more than abstracting the different versions of `pci_get_dev()`. It also hide the usage of the global `struct pci_access pacc` from the caller. This reverts commit 0e8902f1ff2b927bb91a5e89e4fde3d8d71f6692. Change-Id: I0cd2f54cb6a6e35dc353476e0f5e502cbbd06cba Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/73730 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
* tree/: Convert unlock func ptr into enumerate valuesEdward O'Callaghan2023-03-208-74/+130
| | | | | | | | | | | | | | | | | | | Converting the blockprotect unlock function pointer within the flashchip struct into enum values allows for the flashchips db to be turn into pure, declarative data. A nice side-effect of this is to reduce link-time symbol space of chipdrivers and increase modularity of the spi25_statusreg.c and related implementations. BUG=none TEST=ninja test. Change-Id: Ie5c5db1b09d07e1a549990d6f5a622fae4c83233 Signed-off-by: Edward O'Callaghan <quasisec@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/69933 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Sam McNally <sammc@google.com> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
* tests: Add wrap for __fstat50 to fix tests for NetBSDAnastasia Klimchuk2023-03-163-0/+8
| | | | | | | | | | | | | | Tested by running unit tests on NetBSD 9.2 Ubuntu 22.04.1 (still pass) Change-Id: Icb8e453328cb40ab9d628f01ecdc3886a233dad5 Signed-off-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/73649 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Tested-by: Thomas Heijligen <src@posteo.de> Reviewed-by: Thomas Heijligen <src@posteo.de> Reviewed-by: Peter Marheine <pmarheine@chromium.org>
* MAINTAINERS: Add Nikolai Artemiev for raiden_debug_spiNikolai Artemiev2023-03-141-0/+5
| | | | | | | | | | | | | | BUG=none BRANCH=none TEST=none Change-Id: Ie70eafb301b3363caa8e670b67a16cd25c7e15a8 Signed-off-by: Nikolai Artemiev <nartemiev@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/73697 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-by: Thomas Heijligen <src@posteo.de>
* MAINTAINERS: Add Aarya Chaumal for erasure_layoutAarya Chaumal2023-03-141-0/+6
| | | | | | | | | Change-Id: Id0188add883336f2fb494e4169a668e8b502682f Signed-off-by: Aarya Chaumal <aarya.chaumal@gmail.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/73642 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-by: Thomas Heijligen <src@posteo.de>
* fmap: ignore areas with zero sizePeter Marheine2023-03-141-0/+10
| | | | | | | | | | | | | | | | | | | | | | | It's impossible for flashrom_layout to represent zero-sized flash regions but it is possible for a fmap to contain a zero-sized region which causes the resulting layout to fail layout_sanity_checks(), preventing use of that fmap. Because it would very rarely make sense to be able to operate on zero-sized regions anyway and changing layouts to be able to support zero-size regions would entail large changes, instead ignore zero-size regions when present in fmap. TEST=Warning is now printed when using fmap that contains a zero-sized area, and operations on other regions are allowed to proceed. BUG=b:271933192 Change-Id: Ie20971f779acece7a0b3b8f38796fff128ce689a Signed-off-by: Peter Marheine <pmarheine@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/73571 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Thomas Heijligen <src@posteo.de> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
* pcidev: remove pcidev_getdevfn() functionThomas Heijligen2023-03-103-10/+2
| | | | | | | | | | | This function is only called once. Move the content of the function into the caller. Change-Id: Id2983420080f75ae6992edfb032bf5c83b29c803 Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/73570 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
* libpci: drop support for pciutils < 2.2.0Thomas Heijligen2023-03-105-40/+16
| | | | | | | | | | | | | | This version was released in september 2005 and had a breaking api change. Drop it so that we don't need to maintain the old codepath any longer. Beside that, we have already a second codepath which is using the new `pci_get_dev` variant exclusively. Change-Id: If943db350b561a005d8292a53d9255223db3d571 Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/73293 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* include/pci.h: Use __has_include() macro to test pci.h pathThomas Heijligen2023-03-101-3/+7
| | | | | | | | | | | | | | | Some NetBSDs have the pci.h under pciutils/ instead of pci/. But we can't say for sure which variants uses which include path. Just test them with the __has_include() compiler macro. https://gcc.gnu.org/onlinedocs/cpp/_005f_005fhas_005finclude.html Change-Id: Ib20de6bffede910b89937f554b4d56f4799f0762 Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/73292 Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* MAINTAINERS: Add Jean THOMAS for DirtyJTAGJean THOMAS2023-03-101-0/+5
| | | | | | | | | Signed-off-by: Jean THOMAS <virgule@jeanthomas.me> Change-Id: I0d45b9c634dd6f7509e366723e7fe727f0d087cd Reviewed-on: https://review.coreboot.org/c/flashrom/+/73552 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Thomas Heijligen <src@posteo.de> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
* flashchips: Mark AM29LV040B as write-testedAnastasia Klimchuk2023-03-061-1/+1
| | | | | | | | | | | | | Reported by Alex Perez on the mailing list, write operation done successfully with satasii programmer. https://mail.coreboot.org/hyperkitty/list/flashrom@flashrom.org/thread/67OX4CSBGWAGMNGEOATBJGFJCKFD64SU/ Change-Id: I8a42f8214b09c455a10a1f1e9e69feaeca2c62a1 Signed-off-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/73429 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Thomas Heijligen <src@posteo.de>
* flashchips: Mark XMC XM25QH64C as TEST_OK_PREWThomas Heijligen2023-03-061-1/+1
| | | | | | | | | | | | | As reported on the mailing list[0] this flashchip was successfully probed, read, erased and written with a ch341a programmer. [0] https://mail.coreboot.org/hyperkitty/list/flashrom@flashrom.org/message/SMIHEXHZBSCGE2Y2EG75XQHWSKEQ3PP6 Change-Id: Ifca84d9a44bb20091293356f5b1643de41220b64 Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/73363 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
* flashchips: Mark XMC XM25QH256C as TEST_OK_PRThomas Heijligen2023-03-061-1/+1
| | | | | | | | | | | | | As reported on the mailing list[0] this flashchip was successfully probed and read with a ch341a programmer. [0] https://mail.coreboot.org/hyperkitty/list/flashrom@flashrom.org/message/BFBKAJKURZHYQ6OTV3UAA7V5O2ZSJWGN Change-Id: I68d0315f7b29f27ac84374ea7cc69dca207bbacb Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/73362 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
* meson: fix typo "documtation" -> "documentation"Thomas Heijligen2023-03-031-1/+1
| | | | | | | | | | | | When building with -Ddocumentation=enabled/disabled this typo terminates meson because meson can't find the misspellt option. Change-Id: Ia4205b89fd0d7e77ecbcd29392187d8911dd1049 Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/73394 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
* meson: revert to meson version 0.53.0Thomas Heijligen2023-03-033-6/+3
| | | | | | | | | | | | | | | | Debian Bullseye, current stable release, ships only with meson 0.56.2. To go back to an older meson version pass the project_version info as parameter to `sphinx-build` instead of using an environment variable. This is done by overriding the `release` variable in conf.py with `-Drelease=meson.project_version()` at the command line call. Change-Id: Iff9b8307c741a247a652cf666935c9485fa493fa Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/73361 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Alexander Goncharov <chat@joursoir.net> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
* tree/: Drop default_spi_probe_opcode for NULL caseEdward O'Callaghan2023-03-0329-35/+10
| | | | | | | | | | | | | | | | | | | A NULL func pointer is necessary and sufficient for the condition `NULL func pointer => true' as to not need this boilerplate as it implies default behaviour of a supported opcode within the `check_block_eraser()` match supported loop. Ran; ``` $ find . -name '*.[c,h]' -exec sed -i '/.probe_opcode = default_spi_probe_opcode,/d' '{}' \; ``` Change-Id: Id502c5d2596ad1db52faf05723083620e4c52c12 Signed-off-by: Edward O'Callaghan <quasisec@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/70264 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Thomas Heijligen <src@posteo.de> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
generated by cgit v1.2.3 (git 2.25.1) at 2024-05-14 14:58:47 +0000