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* Change the SPI parts of flashrom to prepare for a merge of ICH9 SPI supportCarl-Daniel Hailfinger2008-05-131-17/+17
| | | | | | | | | In theory, this patch has no behaviour changes. Corresponding to flashrom svn r227 and coreboot v2 svn r3301. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Peter Stuge <peter@stuge.se>
* MX25L3205 and W25x40 have been confirmed to probe/read/erase/write OK by ↵Carl-Daniel Hailfinger2008-05-122-3/+4
| | | | | | | | | | | Harald Gutmann SST39VF040 has been confirmed to probe OK by misi e. Corresponding to flashrom svn r226 and coreboot v2 svn r3300. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Add SST39VF512, SST39VF010, SST39VF040 supportCarl-Daniel Hailfinger2008-05-122-0/+7
| | | | | | | | | | The SST39LF series has the same IDs. Add short AMIC vendor ID to flashrom. Corresponding to flashrom svn r225 and coreboot v2 svn r3299. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Peter Stuge <peter@stuge.se>
* Improve flashrom SPI abstraction, second stepCarl-Daniel Hailfinger2008-05-101-18/+18
| | | | | | | | | | | | | This paves the way to have a fully generic generic_spi_command without knowledge about any SPI controller. The third step would be calling SPI controller functions via a function pointer. Corresponding to flashrom svn r224 and coreboot v2 svn r3296. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Peter Stuge <peter@stuge.se>
* Rename generic_spi_*() functions to spi_*()Peter Stuge2008-05-103-67/+67
| | | | | | | | | This is a very early step toward cleaning up SPI code in flashrom. Corresponding to flashrom svn r223 and coreboot v2 svn r3295. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Probe for up to 3 flash chipsClaus Gindhart2008-05-081-3/+19
| | | | | | | | | | | | | | | | | | | Currently there is an ongoing technology migration from LPC/FWH to SPI chips. For this reason some boards have multiple chips of different technologies onboard. This patch makes flashrom probe for up to 3 chips and if more than one chip is found flashrom exits, asking the user to specify -c. [root@localhost src]# ./flashrom ... Multiple flash chips were detected: SST49LF008A M25P16@ICH9 Please specify which chip to use with the -c <chipname> option. [root@localhost src]# Corresponding to flashrom svn r222 and coreboot v2 svn r3291. Signed-off-by: Claus Gindhart <claus.gindhart@kontron.com> Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Claus Gindhart <claus.gindhart@kontron.com>
* Add a tested bitmap field to the flash chip tablePeter Stuge2008-05-033-101/+150
| | | | | | | | | | | | | | | Two bits indicate OK and BAD for each operation PROBE READ ERASE WRITE. 8 bits out of 32 are in use now. No bits set means nothing has been tested. For chips with at least one operation that is not tested or not working, the user is asked to email a report to a special email adress so that the table can be updated. All chips are TEST_UNTESTED for now. Corresponding to flashrom svn r221 and coreboot v2 svn r3277. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Enable ROM decode range to 1MB for vt8237rBari Ari2008-04-291-0/+3
| | | | | | | Corresponding to flashrom svn r220 and coreboot v2 svn r3275. Signed-off-by: Bari Ari <bari@onelabs.com> Acked-by: Stefan Reinauer <stepan@coresystems.de>
* Separate ST M50FLW support from generic JEDEC codeClaus Gindhart2008-04-284-10/+307
| | | | | | | | | | | | | | | | The generic jedec.c does not work for the ST M50FLW flash devices, because they need an unlock command first. For this reason, ST M50FLW support is moved to a new HW support module, because any change in jedec.c would bear the risk to cause problems with the already supported devices. It's already tested with ST M50FLW080A; the other chips of this family i dont have available, so i couldnt test it. Corresponding to flashrom svn r219 and coreboot v2 svn r3274. Signed-off-by: Claus Gindhart <claus.gindhart@kontron.com> Acked-by: Stefan Reinauer <stepan@coresystems.de>
* Handle NULL probe, erase and write function pointers in the flashchips tablePeter Stuge2008-04-281-1/+15
| | | | | | | | | The read pointer was already checked properly. Corresponding to flashrom svn r218 and coreboot v2 svn r3273. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Stefan Reinauer <stepan@coresystems.de>
* 82802ab: touch only blocks that need updatingClaus Gindhart2008-04-241-7/+27
| | | | | | | | | | | | | | | Flash pages, which where excluded from updating using the exclude or the layout option, as well as areas, whose flash contents already contain the desired data, will be skipped. These ensures absolute data security of critical areas (BIOS boot block), e.g. against a sudden power off or a CPU hangup during flashing. As a nice side effect, it speeds up the flash process, if the BIOS to be flashed is very similar to the version in flash. Corresponding to flashrom svn r217 and coreboot v2 svn r3260. Signed-off-by: Claus Gindhart <claus.gindhart@kontron.com> Acked-by: Stefan Reinauer <stepan@coresystems.de>
* ST M50FW016 and ST M50FW040 support the 82802ab command set, not jedecEd Swierk2008-04-071-2/+2
| | | | | | | Corresponding to flashrom svn r216 and coreboot v2 svn r3221. Signed-off-by: Ed Swierk <eswierk@arastra.com> Acked-by: Joseph Smith <joe@smittys.pointclark.net>
* Add ICH9 detectionCarl-Daniel Hailfinger2008-03-181-1/+8
| | | | | | | | | Straight from the datasheet, untested. Corresponding to flashrom svn r215 and coreboot v2 svn r3167. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* OopsStefan Reinauer2008-03-181-0/+206
| | | | | | | | | | | | Forgot to add the file. Support for the Winbond W39V080FA series of chips. Support for flashing on the Kontron 986LCD-M board. Corresponding to flashrom svn r214 and coreboot v2 svn r3166. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Support for the Winbond W39V080FA series of chipsStefan Reinauer2008-03-175-3/+50
| | | | | | | | | Support for flashing on the Kontron 986LCD-M board. Corresponding to flashrom svn r213 and coreboot v2 svn r3165. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Check whether SST FWH chip was successfully erased on flashchip -E, tooStefan Reinauer2008-03-161-9/+11
| | | | | | | Corresponding to flashrom svn r212 and coreboot v2 svn r3153. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de>
* Sort list of flash chips alphabetically, add commentUwe Hermann2008-03-161-60/+68
| | | | | | | Corresponding to flashrom svn r211 and coreboot v2 svn r3152. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Remove nasty warning that happened due to our vendor detectionStefan Reinauer2008-03-151-2/+5
| | | | | | | | Corresponding to flashrom svn r210 and coreboot v2 svn r3151. mechanism. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de>
* Re-add code erroneously removed in r3140Uwe Hermann2008-03-143-195/+101
| | | | | | | Corresponding to flashrom svn r209 and coreboot v2 svn r3146. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Changes M50FW080 to use 82802ab.c instead of jedec.cJoseph Smith2008-03-141-1/+1
| | | | | | | | | This fixes the problem of not being able to erase the chip. Corresponding to flashrom svn r208 and coreboot v2 svn r3145. Signed-off-by: Joseph Smith <joe@smittys.pointclark.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Prepare for ICH7/ICH8 SPI support by adding some debugging for all ICH* chipsetsCarl-Daniel Hailfinger2008-03-141-9/+62
| | | | | | | | | | | | | | Functionality (except printing) should be unchanged. Corresponding to flashrom svn r207 and coreboot v2 svn r3144. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Ward says: This code detects the ICH8 chipset on my laptop, and it appears to use SPI. Acked-by: Ward Vandewege <ward@gnu.org>
* Fix broken flashrom buildUwe Hermann2008-03-141-1/+1
| | | | | | | Corresponding to flashrom svn r206 and coreboot v2 svn r3142. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Fix up one forgotten revert in r3140Carl-Daniel Hailfinger2008-03-141-2/+2
| | | | | | | Corresponding to flashrom svn r205 and coreboot v2 svn r3141. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Revert the delete of 82802ab.c in r3137Carl-Daniel Hailfinger2008-03-145-109/+381
| | | | | | | Corresponding to flashrom svn r204 and coreboot v2 svn r3140. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Also print the chip vendor name in --list-supported outputUwe Hermann2008-03-134-244/+151
| | | | | | | | | | | | Cosmetic changes in some files, partly bending the 80-characters-per-line rule in this special case, as the 80-character-limited version looks equally crappy even in an 80x25 console/xterm, so let's make it at least look good in a high-resolution xterm. Corresponding to flashrom svn r203 and coreboot v2 svn r3139. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Also print the required -m option in --list-supported outputUwe Hermann2008-03-131-2/+10
| | | | | | | Corresponding to flashrom svn r202 and coreboot v2 svn r3138. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Drop 82802ab.c as it is identical to sharplhf00l04.cCarl-Daniel Hailfinger2008-03-134-191/+13
| | | | | | | Corresponding to flashrom svn r201 and coreboot v2 svn r3137. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Peter Stuge <peter@stuge.se>
* Drop the useless rom.layout fileUwe Hermann2008-03-121-3/+0
| | | | | | | | | | It's just an example, likely never been used in the last few years, and the contents are available in the README already anyway. Corresponding to flashrom svn r200 and coreboot v2 svn r3134. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Ward Vandewege <ward@gnu.org>
* Add --list-supported option which lists the supported ROM chips, chipsets, ↵Uwe Hermann2008-03-125-7/+64
| | | | | | | | | and mainboards Corresponding to flashrom svn r199 and coreboot v2 svn r3133. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Ward Vandewege <ward@gnu.org>
* Add missing license header to layout.cUwe Hermann2008-03-041-0/+20
| | | | | | | | | | The file was written by Stefan Reinauer for coresystems GmbH in 2005, as confirmed on IRC. Corresponding to flashrom svn r198 and coreboot v2 svn r3126. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Stefan Reinauer <stepan@coresystems.de>
* Add board_enable for Artec Group DBE61 and DBE62Mart Raudsepp2008-02-201-0/+70
| | | | | | | | | | | Also add a comment about NULL subsystem IDs leaving the board entry out of auto-detection logic. Corresponding to flashrom svn r197 and coreboot v2 svn r3110. Signed-off-by: Mart Raudsepp <mart.raudsepp@artecdesign.ee> Acked-by: Luc Verhaegen <libv@skynet.be> Acked-by: Stefan Reinauer <stepan@coresystems.de>
* Fix compilation with custom CFLAGSClark Rawlins2008-02-141-1/+3
| | | | | | | | | | | | | | | | With this small change it is possible to build flashrom again when specifying custom CFLAGS/LDFLAGS from the make command line like. make CFLAGS="..." LDFLAGS="..." I need to do this when building flashrom in a cross compiler environment like buildroot for a foreign target. Corresponding to flashrom svn r196 and coreboot v2 svn r3102. Signed-off-by: Clark Rawlins <clark@bit63.org> Acked-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Further cleanups to enable_flash_cs5536Mart Raudsepp2008-02-111-5/+2
| | | | | | | | | | | | | | | | - Remove the "enable write to flash" message, as the caller appears to already report that. - Move the 'modprobe msr' suggestions to the first lseek64 error handling, as we get an error there already. - Rename a perror string from "read" to "read msr", as we use the latter already in this function for another read. Corresponding to flashrom svn r195 and coreboot v2 svn r3101. Signed-off-by: Mart Raudsepp <mart.raudsepp@artecdesign.ee> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Add board enable for VIA EPIA SPLuc Verhaegen2008-02-091-1/+25
| | | | | | | | Corresponding to flashrom svn r194 and coreboot v2 svn r3099. Signed-off-by: Luc Verhaegen <libv@skynet.be> Acked-by: Corey Osgood <corey.osgood@gmail.com> Acked-by: Peter Stuge <peter@stuge.se>
* Improve error handling and make RCONF_DEFAULT_MSR address be a constantMart Raudsepp2008-02-081-26/+52
| | | | | | | | | Also, move a big code comment to the top of enable_flash_cs5536(). Corresponding to flashrom svn r193 and coreboot v2 svn r3098. Signed-off-by: Mart Raudsepp <mart.raudsepp@artecdesign.ee> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Write enable flash chips attached to CS3 of CS5536 chipsets (AMD Geode)Mart Raudsepp2008-02-081-12/+33
| | | | | | | | | | | | | | | | This implements support for devices using AMD Geode companion chip CS5536 that have the Boot ROM on NOR flash that is directly connected to FLASH_CS3 (Boot Flash Chip Select). We need to write enable it in the NORF_CTL MSR register for flashrom to be able to write to it, including JEDEC probe commands. This patch allows us to stop using AMD gx_utils.ko for BIOS flashing on the DBE61. Corresponding to flashrom svn r192 and coreboot v2 svn r3097. Signed-off-by: Mart Raudsepp <mart.raudsepp@artecdesign.ee> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Handle JEDEC JEP106W continuation codes in SPI RDIDCarl-Daniel Hailfinger2008-02-063-7/+40
| | | | | | | | | | | | | Some vendors like Programmable Micro Corp (PMC) need this. Both the serial and parallel flash JEDEC detection routines would benefit from a parity/sanity check of the vendor ID. Will do this later. Add support for the PMC Pm25LV family of SPI flash chips. Corresponding to flashrom svn r191 and coreboot v2 svn r3091. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Chris Lingard <chris@stockwith.co.uk>
* Make the vendor name optional in the -m flashrom parameter when there's only ↵Peter Stuge2008-01-274-35/+51
| | | | | | | | | | | | one board name that matches The full syntax still works, and is required when two vendors have boards with the same names. Corresponding to flashrom svn r190 and coreboot v2 svn r3082. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Stefan Reinauer <stepan@coresystems.de>
* Forgot to add Spansion S25FL016A to README, trivialPeter Stuge2008-01-271-0/+1
| | | | | | | Corresponding to flashrom svn r189 and coreboot v2 svn r3080. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se>
* Correctly disable the ROM area Write Protect bit in the Geode LXMarc Jones2008-01-261-1/+1
| | | | | | | | | | Corresponding to flashrom svn r188 and coreboot v2 svn r3078. Signed-off-by: Marc Jones <marc.jones@amd.com> Acked-by: Peter Stuge <peter@stuge.se> Tested on the pcengines alix1c and works fine. Acked-by: Ronald G. Minnich <rminnich@gmail.com>
* Add ids and chip entry for Spansion S25FL016A, tested, workingPeter Stuge2008-01-252-0/+10
| | | | | | | Corresponding to flashrom svn r187 and coreboot v2 svn r3074. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Here is just a little and simple patch to get the MX25L3205D workingHarald Gutmann2008-01-221-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | I've tested and verified the chip myself, and it seems to work everything like supposted, since Carl-Daniel has patched flashrom to use the read funktion on verifying. "benchvice flashrom # ./flashrom -m gigabyte:m57sli -v test.4mb Calibrating delay loop... OK. No coreboot table found. Found chipset "NVIDIA MCP55", enabling flash write... OK. Found board "GIGABYTE GA-M57SLI-S4": enabling flash write... Serial flash segment 0xfffe0000-0xffffffff enabled Serial flash segment 0x000e0000-0x000fffff enabled Serial flash segment 0xffee0000-0xffefffff disabled Serial flash segment 0xfff80000-0xfffeffff enabled LPC write to serial flash enabled serial flash pin 29 OK. MX25L3205 found at physical address 0xffc00000. Flash part is MX25L3205 (4096 KB). Flash image seems to be a legacy BIOS. Disabling checks. Verifying flash... VERIFIED. benchvice flashrom # ls -l test.4mb -rw-r--r-- 1 root root 4194304 22. Jan 16:27 test.4mb Corresponding to flashrom svn r186 and coreboot v2 svn r3072. Signed-off-by: Harald Gutmann <harald.gutmann@gmx.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Flashrom did not use the read function for verifying, it used direct memory ↵Carl-Daniel Hailfinger2008-01-221-2/+6
| | | | | | | | | | | | | | | | | | | access instead That fails if the flash chip is not mapped completely. If the read function is set in struct flashchip, use it for verification as well. This fixes verification of all SPI flash chips >512 kByte behind an IT8716F flash translation chip. "MX25L8005 found at physical address 0xfff00000. Flash part is MX25L8005 (1024 KB). Flash image seems to be a legacy BIOS. Disabling checks. Verifying flash... VERIFIED." Corresponding to flashrom svn r185 and coreboot v2 svn r3070. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Harald Gutmann <harald.gutmann@gmx.net>
* Make sure we delay writing the next byte long enough in SPI byte programmingCarl-Daniel Hailfinger2008-01-221-22/+19
| | | | | | | | | Minor formatting changes. Corresponding to flashrom svn r184 and coreboot v2 svn r3069. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Harald Gutmann <harald.gutmann@gmx.net>
* Omitting the wait for SPI ready when there is no data to be read, e.gRonald Hoogenboom2008-01-211-5/+8
| | | | | | | | | | readcnt==0 saves 10 seconds with the unconditional 10us delay, reducing programming time for SST25VF016B to 40-45 secs. Corresponding to flashrom svn r183 and coreboot v2 svn r3068. Signed-off-by: Ronald Hoogenboom <hoogenboom30@zonnet.nl> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* This patch adds version informationBernhard Walle2008-01-213-6/+23
| | | | | | | | | | | Because 'v' and 'V' are already in use, the patch uses 'R' (for release) and, of course, '--version'. Corresponding to flashrom svn r182 and coreboot v2 svn r3067. Signed-off-by: Bernhard Walle <bernhard.walle@gmx.de> Acked-by: Ulf Jordan <jordan@chalmers.se> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Further abstract SPI functions to allow chips bigger than 512 kB behind IT8716FsRonald Hoogenboom2008-01-193-37/+211
| | | | | | | | | | | Support SPI flash chips bigger than 512 kByte sitting behind IT8716F Super I/O performing LPC-to-SPI flash translation. Corresponding to flashrom svn r181 and coreboot v2 svn r3061. Signed-off-by: Ronald Hoogenboom <hoogenboom30@zonnet.nl> Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Minor documentation improvements/fixes in the README and manpageUwe Hermann2008-01-182-15/+24
| | | | | | | Corresponding to flashrom svn r180 and coreboot v2 svn r3059. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Rename linuxbios_* files in utils repositoryStefan Reinauer2008-01-183-2/+2
| | | | | | | Corresponding to flashrom svn r179 and coreboot v2 svn r3058. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de>
* Rename LinuxBIOS to corebootStefan Reinauer2008-01-1810-35/+35
| | | | | | | Corresponding to flashrom svn r178 and coreboot v2 svn r3054. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de>
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