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* Minor documentation improvements/fixes in the README and manpageUwe Hermann2008-01-182-15/+24
| | | | | | | Corresponding to flashrom svn r180 and coreboot v2 svn r3059. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Rename linuxbios_* files in utils repositoryStefan Reinauer2008-01-183-2/+2
| | | | | | | Corresponding to flashrom svn r179 and coreboot v2 svn r3058. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de>
* Rename LinuxBIOS to corebootStefan Reinauer2008-01-1810-35/+35
| | | | | | | Corresponding to flashrom svn r178 and coreboot v2 svn r3054. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de>
* This patch removes '\n' from the help output since this looks a bit strangeBernhard Walle2008-01-111-1/+1
| | | | | | | | | After the patch [...] The line length is still below 80 characters. Corresponding to flashrom svn r177 and coreboot v2 svn r3045. Signed-off-by: Bernhard Walle <bernhard.walle@gmx.de> Acked-by: Torsten Duwe <duwe@lst.de>
* Enable MX25L8005 supportHarald Gutmann2008-01-101-0/+2
| | | | | | | | | The #defines were already there. Corresponding to flashrom svn r176 and coreboot v2 svn r3042. Signed-off-by: Harald Gutmann <harald.gutmann@gmx.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Add support for the SST25VF040B 4 Mbit SPI flash chipCarl-Daniel Hailfinger2008-01-071-0/+2
| | | | | | | | | Straight from the data sheet, not tested. Corresponding to flashrom svn r175 and coreboot v2 svn r3036. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Reinauer <stepan@coresystems.de>
* Add board enable for the gigabyte ga_2761gxdk boardRonald G. Minnich2008-01-041-0/+2
| | | | | | | Corresponding to flashrom svn r174 and coreboot v2 svn r3033. Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Print at least the vendor for SPI flash chips if the exact chip ID is unknownCarl-Daniel Hailfinger2008-01-043-3/+19
| | | | | | | Corresponding to flashrom svn r173 and coreboot v2 svn r3032. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Ronald G. Minnich <rminnich@gmail.com>
* Unfortunately, EN29F002T, EN29F002AT, EN29F002ANT, EN29F002NT all have ↵Carl-Daniel Hailfinger2007-12-312-4/+5
| | | | | | | | | | | | | exactly the same ID Improve model number printing. Add EN29F002(A)(N)B support while I'm at it. Corresponding to flashrom svn r172 and coreboot v2 svn r3031. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Markus Boas <bios@ryven.de>
* Add continuation ID support to jedec.cCarl-Daniel Hailfinger2007-12-314-5/+126
| | | | | | | | | | | | | | | | | | | | | | | The continuation ID code does not go further than checking for IDs of the type 0x7fXX, but does this for vendor and product ID. The current published JEDEC spec has a list where the largest vendor ID is 7 bytes long, but all leading bytes are 0x7f. The list will grow in the future, and using a 64bit variable will not be enough anymore. Besides that, it seems that the location of the ID byte after the first continuation ID byte is very vendor specific, so we may have to revisit that code some time in the future. (Suggestion for a new encoding: Use a two-byte data type for the ID, the lower byte contains the only non-0x7f byte, the upper byte contains the number of 0x7f bytes used as prefix, which is the bank number minus 1 the vendor ID appears in.) Add support for EON EN29F002AT. Corresponding to flashrom svn r171 and coreboot v2 svn r3030. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Corey Osgood <corey.osgood@gmail.com>
* Refine various vendor ID annotationsCarl-Daniel Hailfinger2007-12-313-11/+24
| | | | | | | | | | | | | | This fixes a few vendor IDs to conform with JEDEC publication 106W (JEP106W), adds some device IDs and provides information about non-conforming IDs. The EON change is left to the patch adding EON chips. This patch should have no effect on code generation. Corresponding to flashrom svn r170 and coreboot v2 svn r3029. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Corey Osgood <corey.osgood@gmail.com>
* All SPI chips mentioned in flashchips.c had their sector size listed as page ↵Carl-Daniel Hailfinger2007-12-291-10/+10
| | | | | | | | | | | | | size Fix that. Page size is uniform 256 bytes for SPI. A sector/block size field in struct flashchip would be nice, though. Corresponding to flashrom svn r169 and coreboot v2 svn r3027. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Corey Osgood <corey.osgood@gmail.com>
* Print the chip status register for all SPI chips on probe if verbose output ↵Carl-Daniel Hailfinger2007-12-291-7/+50
| | | | | | | | | | | | is specified Pretty-print the chip status register (including block lock information) for ST M25P family and Macronix MX25L family chips. Corresponding to flashrom svn r168 and coreboot v2 svn r3026. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Corey Osgood <corey.osgood@gmail.com>
* Add 25VF016B supportCarl-Daniel Hailfinger2007-12-291-0/+2
| | | | | | | | | Untested, but verified against the data sheet. Corresponding to flashrom svn r167 and coreboot v2 svn r3025. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Corey Osgood <corey.osgood@gmail.com>
* Add support for various ST M25P* chipsCarl-Daniel Hailfinger2007-12-172-0/+24
| | | | | | | | | | | | | Add support for ST M25P05-A, M25P10-A, M25P20, M25P40, M25P16, M25P32, M25P64, M25P128. ST M25P80 support is already there. Not tested, but conforming to data sheets and double checked. Corresponding to flashrom svn r166 and coreboot v2 svn r3012. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Rename SPI erase functions to include opcodeCarl-Daniel Hailfinger2007-12-173-22/+22
| | | | | | | | | | | | | | | To make it easier to add new SPI chips to flashchips.c, rename functions with multiple possible opcodes from linear numbering at the end (_1, _2) to include the opcode at the end (_60, _c7). That way, you only have to take a short look at the data sheet and choose the right function by appending the opcode listed in the data sheet. No functional changes. Corresponding to flashrom svn r165 and coreboot v2 svn r3009. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Ward Vandewege <ward@gnu.org>
* Add support for ST M25P80 chipsCarl-Daniel Hailfinger2007-12-163-0/+11
| | | | | | | | | | Detection was tested. Print status register before erase to help debugging block locks. Corresponding to flashrom svn r164 and coreboot v2 svn r3008. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Corey Osgood <corey.osgood@gmail.com>
* Add support for more atmel chipsFrederico Silva2007-12-102-0/+6
| | | | | | | | | | | | | | | AT49F002 AT49F002N AT49F002T AT49F002NT Only tested the read function on AT49F002T. datasheet @ http://www.atmel.com/atmel/acrobat/doc1017.pdf Corresponding to flashrom svn r163 and coreboot v2 svn r3003. Signed-off-by: Frederico Silva <frederico.silva@gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Various coding style fixes, constification, fixed typosUwe Hermann2007-12-043-140/+122
| | | | | | | | | | Also, s/0xFF80/0xFFC0/ in the Acorp 6A815EPD board-enable, as per http://www.linuxbios.org/pipermail/linuxbios/2007-December/027750.html Corresponding to flashrom svn r162 and coreboot v2 svn r2997. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Add board-enable for Acorp 6A815EPDJonathan A. Kollasch2007-12-022-0/+29
| | | | | | | | Corresponding to flashrom svn r161 and coreboot v2 svn r2995. Signed-off-by: Jonathan A. Kollasch <jakllsch@kollasch.net> Acked-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Flashrom support for AMD Geode CS5536Lane Brooks2007-11-131-0/+55
| | | | | | | | | | Attached is a patch that enables AMD Geode CS5536 chipset support. I have tested it successfully on a MSM800 board from digital logic. Corresponding to flashrom svn r160 and coreboot v2 svn r2967. Signed-off-by: Lane Brooks <lbrooks@mit.edu> Acked-by: Jordan Crouse <jordan.crouse@amd.com>
* Fix ATMEL 29C020 detection with flashromCarl-Daniel Hailfinger2007-11-131-2/+6
| | | | | | | | | | | | The JEDEC probe routine had a delay of 10 us after entering ID mode and this was insufficient for the 29C020. The data sheet claims we have to wait 10 ms, but tests have shown that 20 us suffice. Allow for variations in chip delays with a factor of 2 safety margin. Corresponding to flashrom svn r159 and coreboot v2 svn r2962. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Peter Stuge <peter@stuge.se>
* Add support for Intel 440MX and Fujitsu MBM29F400TCUwe Hermann2007-10-303-0/+4
| | | | | | | | | Detection and reading works, writing is not tested. Corresponding to flashrom svn r158 and coreboot v2 svn r2903. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Peter Stuge <peter@stuge.se>
* Add Am29LV040BPeter Lemenkov2007-10-252-0/+3
| | | | | | | | | | | | | Looking through the sources of Uniflash utility I found that this chip is no more no less than low-voltage variant of Am29F040B but with different ID. So I created a very quick patch (attached). Corresponding to flashrom svn r157 and coreboot v2 svn r2897. Signed-off-by: Peter Lemenkov <lemenkov@gmail.com> Acked-by: Peter Stuge <peter@stuge.se>
* Add more Vendor IDs and ensure correct sorting in flash.hPeter Lemenkov2007-10-221-27/+45
| | | | | | | Corresponding to flashrom svn r156 and coreboot v2 svn r2884. Signed-off-by: Peter Lemenkov <lemenkov@gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Introduce block and sector erase routines, but do not use them yetCarl-Daniel Hailfinger2007-10-223-15/+86
| | | | | | | Corresponding to flashrom svn r155 and coreboot v2 svn r2881. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Reinauer <stepan@coresystems.de>
* Remove hardcoded wait from SPI write/erase routines and check the chip ↵Carl-Daniel Hailfinger2007-10-181-18/+2
| | | | | | | | | | | | status register instead This has been tested by Harald Gutmann <harald.gutmann@gmx.net> with a MX25L4005 chip. Corresponding to flashrom svn r154 and coreboot v2 svn r2876. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Reinauer <stepan@coresystems.de>
* Documentation fixes and updatesUwe Hermann2007-10-182-28/+37
| | | | | | | Corresponding to flashrom svn r153 and coreboot v2 svn r2875. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Add generic SPI flash erase and write supportCarl-Daniel Hailfinger2007-10-183-6/+129
| | | | | | | | | | | | | The first chip the code was tested and verified with is the Macronix MX25L4005, but other chips should work as well. Timeouts are still hardcoded to data sheet maxima, but the status register checking code is already there. Thanks to Harald Gutmann for the initial code on which this is loosely based. Corresponding to flashrom svn r152 and coreboot v2 svn r2874. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Reinauer <stepan@coresystems.de>
* Some cosmetic cleanups in the flashrom code and outputUwe Hermann2007-10-1720-49/+48
| | | | | | | Corresponding to flashrom svn r151 and coreboot v2 svn r2873. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Stefan Reinauer <stepan@coresystems.de>
* Fix wrong values/typos in chipset_enable.cCarl-Daniel Hailfinger2007-10-171-2/+2
| | | | | | | | | | This has been confirmed by Ed Swierk in http://www.mail-archive.com/linuxbios@linuxbios.org/msg09788.html . Corresponding to flashrom svn r150 and coreboot v2 svn r2868. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Reinauer <stepan@coresystems.de>
* Multiple flashrom fixesUwe Hermann2007-10-162-2/+4
| | | | | | | | | | | | | | - Install binary in /usr/sbin (not /usr/bin), as it's a root-only tool. - Rename manpage from flashrom.1 to flashrom.8, as section 8 contains "System administration commands (usually only for root)". - Actually install the manpage upon 'make install'. Corresponding to flashrom svn r149 and coreboot v2 svn r2866. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Stefan Reinauer <stepan@coresystems.de>
* Add Gigabyte M61P-S3 SPI flash support to board_enable.cMichael van der Kolff2007-10-162-1/+4
| | | | | | | Corresponding to flashrom svn r148 and coreboot v2 svn r2864. Signed-off-by: Michael van der Kolff <mvanderkolff@gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Convert the existing it8716f_* functions to generic_spi_* functionsCarl-Daniel Hailfinger2007-10-163-15/+22
| | | | | | | Corresponding to flashrom svn r147 and coreboot v2 svn r2863. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Reinauer <stepan@coresystems.de>
* Add spi.c forgotten in r145Carl-Daniel Hailfinger2007-10-151-0/+199
| | | | | | | Corresponding to flashrom svn r146 and coreboot v2 svn r2858. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Reinauer <stepan@coresystems.de>
* Move SPI code out of board_enable.c where it started its lifeCarl-Daniel Hailfinger2007-10-153-171/+3
| | | | | | | | | | | | | | | The SPI chip finding and SPI chip accessor code is moved as well. This can be split later if we feel like it. The non-use of svn cp is intentional because the only history we'd have to preserve are a few commits which were early prototypes of chip identification code. For those who intend to look at that history, they can look at board_enable.c revision 2853. Corresponding to flashrom svn r145 and coreboot v2 svn r2857. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Reinauer <stepan@coresystems.de>
* Changes to support the K8N-NEO3, first tested at Google on GSOC day :-)Ronald G. Minnich2007-10-122-50/+93
| | | | | | | | | | Also minor changes to remove tab-space combinations where possible. Corresponding to flashrom svn r144 and coreboot v2 svn r2850. Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Signed-off-by: David Hendricks <david.hendricks@gmail.com> Acked-by: Stefan Reinauer <stepan@coresystems.de>
* Revert my last cleanup patchUwe Hermann2007-10-104-22/+25
| | | | | | | Corresponding to flashrom svn r143 and coreboot v2 svn r2847. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Cosmetic changes to make the flashrom output more consistentUwe Hermann2007-10-104-25/+22
| | | | | | | Corresponding to flashrom svn r142 and coreboot v2 svn r2846. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Fix the help, and print a message when nothing happensJordan Crouse2007-10-041-5/+11
| | | | | | | | | | The help implied that writes happen by default, which they don't. Fix the text, and say something when we dont specify any commands. Corresponding to flashrom svn r141 and coreboot v2 svn r2820. Signed-off-by: Jordan Crouse <jordan.crouse@amd.com> Acked-by: Stefan Reinauer <stepan@coresystems.de>
* This patch aims to restructure SPI flash support in a more reasonable wayCarl-Daniel Hailfinger2007-10-023-19/+119
| | | | | | | | | | | | | | | | | | It introduces a generic SPI host driver for the IT8716F Super I/O which will enable easy SPI programming without having to care for the peculiarities of the SPI host. To activate probing for the IT8716F, you have to use the gigabyte:m57sli mainboard override. SPI support will then use the gathered SPI host data to access the SPI flash. This has been tested sucessfully by Ward Vandewege <ward@gnu.org> on the GA-M57SLI v2.0, which has a MX25L4005 SPI flash part. Corresponding to flashrom svn r140 and coreboot v2 svn r2817. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Ward Vandewege <ward@gnu.org>
* Add preliminary SPI flash identification support for SPI chips attached to ↵Carl-Daniel Hailfinger2007-09-271-0/+101
| | | | | | | | | | | | | ITE IT8716F Super I/O Right now this is hardcoded to the Gigabyte M57SLI board. It works only with rev 2.0 of the board, but it will bail out on earlier versions, so no damage can occur. Corresponding to flashrom svn r139 and coreboot v2 svn r2811. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Ward Vandewege <ward@gnu.org>
* Change out/in combinations to pci_read/write_byte in sis630 chipset enableAlex Beregszaszi2007-09-111-6/+4
| | | | | | | Corresponding to flashrom svn r138 and coreboot v2 svn r2770. Signed-off-by: Alex Beregszaszi <alex@rtfs.hu> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Remove useless 'extern' keywordsUwe Hermann2007-09-092-58/+58
| | | | | | | Corresponding to flashrom svn r137 and coreboot v2 svn r2769. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Add '(C)' where it's missing (for consistency reasons)Uwe Hermann2007-09-0919-29/+29
| | | | | | | Corresponding to flashrom svn r136 and coreboot v2 svn r2768. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Add missing license header to udelay.cUwe Hermann2007-09-091-0/+20
| | | | | | | | | | | | | | | I'm self-ack'ing this, as the origin of the code in udelay.c (and thus the license and copyright owner) is pretty clear. The code which is now in udelay.c was split out from flash_rom.c in r1428, and flash_rom.c, in turn, has been around since the beginning and had a 'Copyright 2000 Silicon Integrated System Corporation' line as well as the usual GPLv2-or-later license header. Corresponding to flashrom svn r135 and coreboot v2 svn r2767. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Add a dedicated licenseUwe Hermann2007-09-081-0/+339
| | | | | | | | | | Add a copy of the GPL in the flashrom repository as it's an independent project (being packaged by distros, among other things). Corresponding to flashrom svn r134 and coreboot v2 svn r2764. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Add support for the Winbond W29EE011Markus Boas2007-08-305-1/+68
| | | | | | | Corresponding to flashrom svn r133 and coreboot v2 svn r2753. Signed-off-by: Markus Boas <ryven@ryven.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Add support for the Winbond W29C040PMarkus Boas2007-08-303-0/+4
| | | | | | | Corresponding to flashrom svn r132 and coreboot v2 svn r2752. Signed-off-by: Markus Boas <ryven@ryven.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Change all flashrom license headers to use our standard formatUwe Hermann2007-08-2921-306/+257
| | | | | | | | | No changes in content of the files. Corresponding to flashrom svn r131 and coreboot v2 svn r2751. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
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