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* Various IT85* cleanups and fixesCarl-Daniel Hailfinger2011-03-083-19/+32
| | | | | | | | | | | | | | | | | | | | Fix a few typos. Change the EC memory region mapping name. Drop unused function parameter. Use mmio_writeb()/mmio_readb() to get reliable access to volatile memory locations instead of plain pointer access which is optimized away by gcc. Use own it85_* SPI high-level chip read/write functions instead of relying on unrelated ICH functions. Corresponding to flashrom svn r1279. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> David writes: I applied the patch against the Chromium OS branch and successfully tested read and write operations on a Cr48. Acked-by: David Hendricks <dhendrix@google.com>
* Fix compilation if CONFIG_INTERNAL=noCarl-Daniel Hailfinger2011-03-083-4/+8
| | | | | | | | | | | Fix compilation if everything except CONFIG_SATAMV is no. Do not compile in PCI support for wiki printing if no PCI devices are supported. Corresponding to flashrom svn r1278. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
* Fix broken compilation caused by a typo in r1275Idwer Vollering2011-03-071-1/+1
| | | | | | | Corresponding to flashrom svn r1277. Signed-off-by: Idwer Vollering <vidwer@gmail.com> Acked-by: Idwer Vollering <vidwer@gmail.com>
* Mark Macronix MX25L1605D as fully testedSven Schnelle2011-03-071-1/+1
| | | | | | | Corresponding to flashrom svn r1276. Signed-off-by: Sven Schnelle <svens@stackframe.org> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* SST39SF512 is testedMichael Karcher2011-03-071-1/+1
| | | | | | | | | Flashrom -V -w: http://paste.flashrom.org/view.php?id=395 Corresponding to flashrom svn r1275. Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Remove vendorid parameter from pcidev_init()Carl-Daniel Hailfinger2011-03-0715-63/+18
| | | | | | | | | | | | | | | Simplify pcidev_init by killing the vendorid parameter which was pretty useless anyway since it was present in the pcidevs parameter as well. This also allows us to handle multiple programmers with different vendor IDs in the same driver. Fix compilation of flashrom with only the nicrealtek driver. Corresponding to flashrom svn r1274. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
* Add a board enable for Asus P4P800-VMDiego Elio Pettenò2011-03-061-0/+2
| | | | | | | | | | | | | Only list the memory controller PCI IDs because the only other subsystem mentioned is used by network and sound interfaces both of which can be turned off in BIOS. Tested on a board rev 1.85. Corresponding to flashrom svn r1273. Signed-off-by: Diego Elio Pettenò <flameeyes@gmail.com> Acked-by: Idwer Vollering <vidwer@gmail.com> Acked-by: Stefan Reinauer <stepan@coreboot.org>
* Mark PMC Pm49FL004, SST SST49LF002A/B, SST SST49LF004A/B and ↵Idwer Vollering2011-03-061-4/+4
| | | | | | | | | Winbond_W39V040FB as write tested Corresponding to flashrom svn r1272. Signed-off-by: Idwer Vollering <vidwer@gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Add Gigabyte GA-MA780G-UD3H to mainboard support listBernhard Geier2011-03-061-0/+1
| | | | | | | | | http://www.flashrom.org/pipermail/flashrom/2010-October/005117.html Corresponding to flashrom svn r1271. Signed-off-by: Bernhard Geier <geierb@geierb.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Add support for ST M25PX16 and mark it as supportedCarl Worth2011-03-062-0/+30
| | | | | | | | | | Tests were performed with write and verify operations to 4 different M25PX16 chips with a Dediprog SF100. Corresponding to flashrom svn r1270. Signed-off-by: Carl Worth <carl.d.worth@intel.com> Acked-by: Idwer Vollering <vidwer@gmail.com>
* Mark SST49LF080A as fully testedBrandon Dowdy2011-03-062-1/+2
| | | | | | | | | | | | Mark EVGA nForce 780i board as supported. Full logs are here: http://www.flashrom.org/pipermail/flashrom/2011-January/005779.html Corresponding to flashrom svn r1269. Signed-off-by: Brandon Dowdy <brandonrd7@gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Add W39L040Michael Karcher2011-03-063-0/+47
| | | | | | | Corresponding to flashrom svn r1268. Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Add coreboot IDs to make manual selection of HP xw9400 possibleMichael Karcher2011-03-061-1/+1
| | | | | | | Corresponding to flashrom svn r1267. Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Board-enable for GA-K8N51GMFMichael Karcher2011-03-062-1/+5
| | | | | | | | | | | | | | | | | | Gigabyte is not really helpful with their PCI IDs for us, the subsystem IDs used just mean "gigabyte northbridge" and "gigabyte southbridge". We should investigate whether autodetection of this board is causing interference with other boards. real version 2: Extend list of PCI IDs for nvidia southbridges. flashrom -V: http://paste.flashrom.org/view.php?id=326 lspic: http://paste.flashrom.org/view.php?id=328 superiotool: http://paste.flashrom.org/view.php?id=329 Corresponding to flashrom svn r1266. Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Add HP e-Vectra P2706TMichael Karcher2011-03-062-6/+24
| | | | | | | | | | | | | | Reported by: Michal Janke <jankeso@gmail.com> flashrom -V: http://paste.flashrom.org/view.php?id=370 lspci: http://paste.flashrom.org/view.php?id=371 superiotool: http://paste.flashrom.org/view.php?id=372 and http://www.flashrom.org/pipermail/flashrom/2011-March/005878.html Corresponding to flashrom svn r1265. Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* I tested a few mainboards and flash chipsYul Rottmann2011-03-052-2/+4
| | | | | | | | | | | | Successfully tested MSI MS-7596 (785GM-E51). Successfully tested ASRock 890GX Extreme3. Successfully tested Winbond W25x80. Mention which GIGABYTE GA-MA78G-DS3H board revision was tested. Corresponding to flashrom svn r1264. Signed-off-by: Yul Rottmann <yulrottmann@bitel.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Update the ITE IT8500 EC support to match the current state of the ↵David Hendricks2011-02-284-13/+176
| | | | | | | | | | | | | | | | | | | | | | | | | | flashrom-chromium tree This code has been deployed and tested to work on the Cr-48. There are a few caveats, though: - The boot BIOS straps register must be modified to select LPC. This can be done with the "select_bbs.sh" script (Install iotools at http://code.google.com/p/iotools/ before using select_bbs). - It is very important to disable power management daemons before running flashrom on this EC. I commented out the brute force method we use in the Chromium OS branch that disables powerd, since IIRC Carl-Daniel has a better approach in the works. - Due to dependencies which may be introduced by the OEM/ODM EC firmware, the code is not guaranteed to work for anything other than the Cr-48. Corresponding to flashrom svn r1263. Signed-off-by: David Hendricks <dhendrix@google.com> Carl-Daniel comments: Code is not hooked up yet because probing needs to be sorted out. Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Add generalized support for ITE IT8500/IT8502 embedded controllersDonald Huang2011-02-221-0/+262
| | | | | | | | | | | | | | The patch was developed by Google. It was tested for IT8500E on a Chrome OS platform and may require modification depending on ODM/OEM customization and EC firmware version. This patch is not officially supported by ITE Tech Inc. Corresponding to flashrom svn r1262. Signed-off-by: Donald Huang <donald.huang@ite.com.tw> Signed-off-by: Yung-chieh Lo <yjlou@google.com> Signed-off-by: David Hendricks <dhendrix@google.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Support 64-bit MEM BARs wherever possibleCarl-Daniel Hailfinger2011-02-152-24/+133
| | | | | | | | | | | | | | | | | Add more sanity checks for BARs and abort if resources are unreachable. Undecoded resources are reported, but flashrom will proceed anyway just in case the BIOS screwed up the configuration. (The empty CardBus handler is intentional, according to the spec no BARs in PCI config space are used by CardBus.) Found while working on a driver for the Angelbird PCIe-based SSD which has 64-bit capable MEM BARs. Corresponding to flashrom svn r1261. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
* Add support for some AMD Am29LV* chipsCarl-Daniel Hailfinger2011-02-052-0/+248
| | | | | | | | | | | | Add support for AMD Am29LV001BB, Am29LV001BT, Am29LV002BB, Am29LV002BT, Am29LV004BB, Am29LV004BT, Am29LV008BB, Am29LV008BT. Thanks to Mark Pustjens for testing the Am29LV001BB. Corresponding to flashrom svn r1260. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
* Improve debugging for unaligned erase in the flash chip emulatorCarl-Daniel Hailfinger2011-02-041-12/+6
| | | | | | | | | Fix out-of-bounds access for chip erase in the flash chip emulator. Corresponding to flashrom svn r1259. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: David Hendricks <dhendrix@google.com>
* Support for Angelbird Wings PCIe SSD (solid-state drive)Carl-Daniel Hailfinger2011-02-046-1/+235
| | | | | | | | | | | | | | | It uses a Marvell 88SX7042 SATA controller internally which has access to a separate flash chip hosting the option ROM. Thanks to Angelbird Ltd for sponsoring development of this driver! I expect the code to work for that SATA controller even if it is not part of the Angelbird SSD. Corresponding to flashrom svn r1258. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
* Support Dediprog LEDs on devices with 2 and 3 LEDsStefan Reinauer2011-01-281-87/+90
| | | | | | | Corresponding to flashrom svn r1257. Signed-off-by: Stefan Reinauer <reinauer@google.com> Acked-by: Mathias Krause <mathias.krause@secunet.com>
* Fix sparse warning: Unknown escape %Peter Huewe2011-01-252-2/+2
| | | | | | | | | | | This patch fixes wrong escaping of %. In print.c %%2b is correct instead of \%2b ("%%2b"=%2b=+) In board_enable.c %d is correct instead of \%d. Corresponding to flashrom svn r1256. Signed-off-by: Peter Huewe <peterhuewe@gmx.de> Acked-by: Stefan Reinauer <stepan@coreboot.org>
* Fix sparse warning: Using plain integer as NULL pointerPeter Huewe2011-01-247-27/+27
| | | | | | | | | | | This patch fixes the "using plain integer as NULL pointer" warnings generated by running sparse on the flashrom source. Corresponding to flashrom svn r1255. Signed-off-by: Peter Huewe <peterhuewe@gmx.de> Acked-by: Mathias Krause <mathias.krause@secunet.com> Acked-by: Stefan Reinauer <stepan@coreboot.org>
* Secret knowledge is cool, but public knowledge is betterCarl-Daniel Hailfinger2011-01-201-5/+117
| | | | | | | | | | | | | | | Implement all Dediprog commands found in USB traces, even if their purpose is not yet known. Annotate unknown commands with info about the call sequence they are embedded in and the firmware version of the log. Add a new shutdown command for firmware 5.x (of which Stefan thinks it's "switch the Pass light on" hence it is called late in the game) Corresponding to flashrom svn r1254. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Reinauer <reinauer@google.com>
* Avoid printing mapped addresses for programmers that do not map flash chipsStefan Reinauer2011-01-191-2/+9
| | | | | | | | | | | | | | Don't print the local memory flash chip address on programmers that don't actually map the flash chip into local memory (like the dediprog) because the value does not make sense there. This version was reworked / rewritten by Mathias Krause to have less "impact" Corresponding to flashrom svn r1253. Signed-off-by: Stefan Reinauer <reinauer@google.com> Acked-by: Mathias Krause <mathias.krause@secunet.com>
* Convince compilers to put constant data into the .rodata sectionMathias Krause2011-01-178-26/+26
| | | | | | | | | | | | | | | | This patch reduces the stack usage by declaring 'const' stack variables as 'static const' so they end up in the .rodata section instead of being copied from there to the stack for every invocation of the corresponding function. As a plus we end up in having a smaller binary as the "copy from .rodata to stack" code isn't emitted by the compiler any more (roughly -100 bytes). Corresponding to flashrom svn r1252. Signed-off-by: Mathias Krause <mathias.krause@secunet.com> Acked-by: Stefan Reinauer <stepan@coreboot.org>
* The AT26DF081A requires the Write Enable Latch (WLE) to be set for ↵Mathias Krause2011-01-171-2/+3
| | | | | | | | | | | | | write/erase operations Also bit 5 is the Erase/Program Error (EPE) bit, so has nothing to do with the block protection. Ignore it when testing for block protections. Corresponding to flashrom svn r1251. Signed-off-by: Mathias Krause <mathias.krause@secunet.com> Tested-by: Mathias Krause <mathias.krause@secunet.com> Acked-by: Stefan Reinauer <stepan@coreboot.org>
* Fix decoding of SB600 LPC ROM protection registersMathias Krause2011-01-011-6/+6
| | | | | | | | | | The address part was using a bit of the size, the size was missing the upper bit, was off by 1023 bytes and included the protection bits. Corresponding to flashrom svn r1250. Signed-off-by: Mathias Krause <mathias.krause@secunet.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Compilation fix for djgppIdwer Vollering2010-12-261-3/+3
| | | | | | | | | | | | This corrects a djgpp build error, seen with r1232 and later. pcidev.c:210: error: conflicting types for 'rpci_write_long' programmer.h:226: error: previous declaration of 'rpci_write_long' was here Corresponding to flashrom svn r1249. Signed-off-by: Idwer Vollering <vidwer@gmail.com> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
* Enable unlocking (erasing/writing) W39V040FB chipsIdwer Vollering2010-12-263-0/+12
| | | | | | | | | | Add code for the unlocking (erasing/writing) of Winbond W39V040FB chips, enabling erasing/writing this type of chip. Corresponding to flashrom svn r1248. Signed-off-by: Idwer Vollering <vidwer@gmail.com> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
* Mark MX25L3205, W25Q80, W25Q32 and W25Q64 as fully testedDavid Hendricks2010-12-131-4/+4
| | | | | | | Signed-off-by: David Hendricks <dhendrix@google.com> Acked-by: Stefan Reinauer <stepan@coreboot.org> Corresponding to flashrom svn r1247.
* Simplify get_next_write in the partial write codeCarl-Daniel Hailfinger2010-12-061-3/+1
| | | | | | | | | Suggested by Michael Karcher. Corresponding to flashrom svn r1246. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
* Add support for Winbond W39V040FB and W39V040FCCarl-Daniel Hailfinger2010-12-056-174/+332
| | | | | | | | | | | | | | | | | | | | Print lock status for all supported Winbond W39* chips: W39V040A, W39V040B, W39V040C, W39V040FA, W39V040FB, W39V040FC, W39V080A, W39V080FA, W39V080FA (dual mode). Fill in correct probe timing for Winbond W39V040C and W39V080FA. Please note that the W39V040B/W39V040FB pair has identical IDs, identical read/write/erase, but locking differs. Same applies to W39V040C/W39V040FC. This causes double detection on chipsets which support LPC and FWH, making flashing more difficult because the user has to select the correct chip. This is called the evil twin problem. A better evil twin handling (patch available) will resolve that problem. Corresponding to flashrom svn r1245. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
* Clean up erase function checkingCarl-Daniel Hailfinger2010-12-051-24/+41
| | | | | | | | | Update a few comments and messages to improve readability. Corresponding to flashrom svn r1244. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
* Stop reading layout info when the max layout count has been reachedCarl-Daniel Hailfinger2010-12-041-0/+8
| | | | | | | Corresponding to flashrom svn r1243. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Annotate the following chips with probe timingDavid Borg2010-12-041-14/+14
| | | | | | | | | | Am29F016D, Am29F040B, Am29LV040B, Am29LV081B, A29002B, A29002T, A29040B, MX29F001B, MX29F001T, MX29F002B, MX29F002T, MX29LV040, M29F040B Corresponding to flashrom svn r1242. Signed-off-by: David Borg <borg.db@gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Add support for the Open Graphics Project development card, OGD1, as a SPI ↵Mark Marshall2010-12-039-3/+281
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | flash programmer The project is in the the process of designing and making a complete, open source, graphics card. More info at http://wiki.opengraphics.org. The first development card is a PCI add in card containing a couple of FPGAs and a couple of serial flash chips (amongst other things). The FPGAs are called XP10 and S3 (their part numbers). The XP10 contains its own flash and does not need to be programmed by flashrom - it ensures that the device can enumerate on the PCI bus without needing further configuration. The larger FPGA is the S3. This is configured from a large SPI flash (2 MBytes). The second SPI flash is used to store the VGA BIOS. It is smaller (128 KBytes). This patch adds support for programming either of the two SPI flash chips. The programmer device takes one configuration option which selects which of the two flash chips is accessed. This must be set to either "cprom" or "bprom". (The project refers to the two chips as "cprom" / "bprom", "s3" and "bios" are more readable alternatives). Add support for SST SST25VF010 (REMS). Mark SST SST25VF016B as tested for write. Corresponding to flashrom svn r1241. Signed-off-by: Mark Marshall <mark.marshall@csr.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Avoid printing the chip locks if chip detection was forcedCarl-Daniel Hailfinger2010-12-021-2/+6
| | | | | | | | | | Lock access may involve flash chip registers which will not be mapped if automatic detection failed. Corresponding to flashrom svn r1240. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Add a board-enable for the MSI MS-6391 (845 Pro4)Uwe Hermann2010-12-022-0/+3
| | | | | | | | | I found this via educated guessing and trial-and-error. Corresponding to flashrom svn r1239. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Handle erase failure in partial writeCarl-Daniel Hailfinger2010-12-021-4/+13
| | | | | | | Corresponding to flashrom svn r1238. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
* Add support for Spansion S25FL004A, S25FL032A, and S25FL064ARudy Host2010-11-292-0/+81
| | | | | | | | | Tested S25FL064A using a Bus Pirate. Corresponding to flashrom svn r1237. Signed-off-by: Rudy Host <segfault@committeeofdoom.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Dump all VIA SPI registers like for ICH7Carl-Daniel Hailfinger2010-11-241-7/+49
| | | | | | | | | | Handle BBAR on VIA. Handle SPI lockdown on VIA. Corresponding to flashrom svn r1236. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Rudolf Marek <r.marek@assembler.cz>
* Add chunked write ability to the Dediprog SF100 driverCarl-Daniel Hailfinger2010-11-233-2/+9
| | | | | | | | | | | | | | Please note that the write speedup only applies to chips which have SPI page write (i.e. chips using spi_chip_write_256). This is a quick fix for write speed until I get around to implementing full bulk SPI write support. Corresponding to flashrom svn r1235. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Richard A. Smith <richard@laptop.org> Acked-by: Mathias Krause <mathias.krause@secunet.com>
* Support bulk read on Dediprog SF100Carl-Daniel Hailfinger2010-11-161-6/+109
| | | | | | | | | | | | | | | | | | | Should result in native speed for plain read and erase. Should result in a measurable speedup for writes due to a fast verify. Packet size is 512 bytes. Depending on your USB hardware and the Dediprog firmware version, this may not work at all. That said, it worked on the hardware we tested. Add lots of error checking where it was missing before. Thanks to Richard A. Smith, Mathias Krause and David Hendricks for testing multiple iterations of this patch. Corresponding to flashrom svn r1234. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Richard A. Smith <richard@laptop.org> Acked-by: Mathias Krause <mathias.krause@secunet.com>
* Read the to-be-verified area in one goCarl-Daniel Hailfinger2010-11-161-33/+17
| | | | | | | | | | | | | | | | Verify_range() and check_erased_range() check each page separately. While that may have seemed like a good idea back when the code was introduced, it has no benefits for any of the chips where we support write because all of them handle cross-page reads nicely. The only class of chips where this change could be a problem is chips with non power of two sector sizes which have gaps in the address space. We simply require their read functions to provide gap-free results and leave it at that. Corresponding to flashrom svn r1233. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
* Revert PCI config space writes on shutdownCarl-Daniel Hailfinger2010-11-107-65/+118
| | | | | | | | | | | | | | | This means all chipset enables etc. will be undone on shutdown. Reversible PCI config space writes now use rpci_write_*(). PCI config space writes which are one-shot (e.g. communication via config space) should continue to use the permanent pci_write_* variants. Extend the number of available register_shutdown slots to 32. Corresponding to flashrom svn r1232. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
* Add support for the OpenMoko debug boards v2 and v3Alex Badea2010-11-101-2/+11
| | | | | | | | | | | | | | | Add support for the OpenMoko Neo1973/Neo FreeRunner debug board version 2 or 3 (vid:pid 1457:5118). The new type is called "openmoko". Information about the debug board can be found at http://wiki.openmoko.org/wiki/Debug_Board_v3 Corresponding to flashrom svn r1231. Signed-off-by: Alex Badea <vamposdecampos@gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Use device-specific vendor ID in ftdi_usb_open() callAlex Badea2010-11-101-1/+1
| | | | | | | | | | | | | ft2232_spi ftdi_usb_open() is called with the constant FTDI_VID vendor ID. Fix it by using the programmer-type-dependent ft2232_vid variable, to allow programmers with other vendor IDs. Corresponding to flashrom svn r1230. Signed-off-by: Alex Badea <vamposdecampos@gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
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