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* Add support for every single SiS chipset out thereCarl-Daniel Hailfinger2009-11-153-67/+221
| | | | | | | | | | | | | | | | | | | | | The two existing SiS chipset enables (compared to the 28 in this patch) were refactored, and one of them was fixed. A function to match PCI vendor/class combinations was added to generic code. Tested on the "Elitegroup K7S5A". Results are somewhat unexpected (some PCI settings seem to be inaccessible, but it still works). This is not based on any docs, but rather on detailed analysis of existing opensource code for some of the chipsets. Thanks to for Adrian Glaubitz testing. Corresponding to flashrom svn r759. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Adrian Glaubitz <glaubitz@physik.fu-berlin.de>
* Mark "Asus K8V" as supportedCarl-Daniel Hailfinger2009-11-141-0/+2
| | | | | | | | | | | | Reported by martin f krafft <madduck@madduck.net> Mark "Asus K8V SE Deluxe" as supported. Reported by Luke Dashjr <luke_coreboot@dashjr.org> Corresponding to flashrom svn r758. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Retry correct range in write_page_write_jedec()Carl-Daniel Hailfinger2009-11-142-4/+4
| | | | | | | | | | | | | | | | The automatic retry in write_page_write_jedec didn't retry flashing the correct range, essentially rendering the functionality useless. This patch simplifies the code and fixes the bug. Thanks to Luke Dashjr for testing. Mark Winbond W29C040P as supported. Corresponding to flashrom svn r757. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Luke Dashjr <luke_coreboot@dashjr.org>
* Fix incorrect comment in SST49LF004A/B descriptionCarl-Daniel Hailfinger2009-11-061-1/+1
| | | | | | | Corresponding to flashrom svn r756. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Add infrastructure to check the maximum supported flash size of chipsets and ↵Carl-Daniel Hailfinger2009-10-313-3/+91
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | mainboards The rationale is to warn users when they, for example, try to flash a 512KB parallel flash chip but their chipset only supports 256KB, or they try to flash 512KB and the chipset _does_ theoretically support 512KB but their special board doesn't wire all address lines and thus supports only 256 KB ROM chips at maximum. This has cost Uwe hours of debugging on some board already, until he figured out what was going on. We should try warn our users where possible about this. The chipset and the chip may have more than one bus in common (e.g. SB600 and Pm49* can both speak LPC+FWH) and on SB600/SB7x0/SB8x0 there are different limits for LPC and FWH. The only way to tell the user about the exact circumstances is to spew error messages per bus. The code will issue a warning during probe (which does fail for some chips if the size is too big) and abort before the first real read/write/erase action. If no action is specified, the warning is printed anyway. That way, a user can find out why probe might not have worked, and will be stopped before he/she gets incorrect results. Add a bitcount function to the infrastructure. Corresponding to flashrom svn r755. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Adjust a help text for external PCI programmers to the new parameter schemeCarl-Daniel Hailfinger2009-10-301-1/+1
| | | | | | | | | Pointed out by Maciej Pijanka. Corresponding to flashrom svn r754. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* ichspi: remove obnoxious debug messageCarl-Daniel Hailfinger2009-10-221-4/+1
| | | | | | | | | | | | | | | | | Since we don't have any debug level printing infrastructure yet, I propose to kill the obnoxious debug message in ichspi.c which was added to check for correct PREOP handling. We know the code works fine (after getting a few reports over 100 MB long) and there's no point in keeping it around anymore. If there is any desire, we can reinstate it as print_spew or whatever once the debug level infrastructure is merged, but at that point we probably just are happy that the debug output isn't there anymore. Corresponding to flashrom svn r753. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Luc Verhaegen <libv@skynet.be>
* Board enable for Shuttle FN25 (SN25P)Luc Verhaegen2009-10-211-0/+21
| | | | | | | | | | | | | | Shuttle SFF PC is SN25P, board FN25, AMD socket 939 with an nForce4 chipset. Config register 0x92 on the ISA bridge needs to be cleared for TBL# to be raised. No information about individual bits of this register is currently available. Corresponding to flashrom svn r752. Signed-off-by: Luc Verhaegen <libv@skynet.be> Acked-by: Ulf Mehlig <ulf@ufpa.br>
* Remove confusing out-of-date commentCarl-Daniel Hailfinger2009-10-191-3/+0
| | | | | | | Corresponding to flashrom svn r751. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Add missing NVIDIA PCI IDs to wiki outputUwe Hermann2009-10-061-0/+3
| | | | | | | Corresponding to flashrom svn r750. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Mark the following boards as supported (no board-enable needed)Uwe Hermann2009-10-063-5/+14
| | | | | | | | | | | | | | | - MSI MS-6153 (reported by Uwe Hermann <uwe@hermann-uwe.de>) Tested by me on hardware. The board decodes max. 256 KB. - MSI MS-6156 (reported by Uwe Hermann <uwe@hermann-uwe.de>) Tested by me on hardware. The board decodes max. 256 KB. Also, fix Dell PowerEdge 1850 name and add some more board URLs. Corresponding to flashrom svn r749. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Upon popular request, move board support tables to print.cUwe Hermann2009-10-062-143/+151
| | | | | | | Corresponding to flashrom svn r748. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Mark NVIDIA Nforce4/MCP04 as testedLuc Verhaegen2009-10-061-1/+1
| | | | | | | | | Oops. Corresponding to flashrom svn r747. Signed-off-by: Luc Verhaegen <libv@skynet.be> Acked-by: Luc Verhaegen <libv@skynet.be>
* Board enable for EPoX EP-8RDA3+Luc Verhaegen2009-10-051-0/+18
| | | | | | | | | | | | | SocketA + nForce2 + MCP2. Motherboard includes a second ethernet controller and an Agere firewire controller with valid subsystem ids, so these are used for matching the board. Corresponding to flashrom svn r746. Signed-off-by: Luc Verhaegen <libv@skynet.be> Acked-by: Eddie Vanhove <moonraket@hotmail.com>
* Board enable for ASUS P5ND2-SLI DeluxeLuc Verhaegen2009-10-051-7/+39
| | | | | | | | | | | | | | This patch reorganises the board_ga_k8n_sli to create nvidia_mcp_gpio_raise, a more general routine to set these bits. Without docs, i can only assume that these memory area are gpio lines. Then it becomes easy to add support for this nForce4 SLI board. Corresponding to flashrom svn r745. Signed-off-by: Luc Verhaegen <libv@skynet.be> Acked-by: Martin Szulecki <opensuse@sukimashita.com>
* Chipset support for the nVidia nForce 4Luc Verhaegen2009-10-051-0/+1
| | | | | | | | | | Add pciids for the new isa bridge, and hook it to the nforce2 chipset enable. Corresponding to flashrom svn r744. Signed-off-by: Luc Verhaegen <libv@skynet.be> Acked-by: Martin Szulecki <opensuse@sukimashita.com>
* There is no need to tell people to install libz if flashrom doesn't need libzCarl-Daniel Hailfinger2009-10-032-12/+37
| | | | | | | | | | | | | | | So far, the only case where libz is needed is when a library (libpci) pulls in libz and even then it only happens if libpci is available in a static version only and said static version has libz requirements. Check for libpci separately and don't require libz if it isn't needed. Clarify the README. Corresponding to flashrom svn r743. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Reinauer <stepan@coresystems.de>
* Cosmetics and small coding style fixesUwe Hermann2009-10-012-39/+43
| | | | | | | | | Also, introduce BITMODE_BITBANG_SPI to eliminate a magic value. Corresponding to flashrom svn r742. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Make bitbang_spi naming consistentCarl-Daniel Hailfinger2009-10-013-34/+34
| | | | | | | Corresponding to flashrom svn r741. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Disable NVIDIA flashing support for now, erase/write is not properly ↵Uwe Hermann2009-10-011-2/+2
| | | | | | | | | | | | working, yet This needs more testing and investigation (partly timing related, it seems). Reads did work in multiple cases, though. Corresponding to flashrom svn r740. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Introduce proper error checking for SPI programmingCarl-Daniel Hailfinger2009-10-012-8/+10
| | | | | | | Corresponding to flashrom svn r739. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Reinauer <stepan@coresystems.de>
* Add comments about the meaning of block erase related struct flashchip membersCarl-Daniel Hailfinger2009-10-012-23/+97
| | | | | | | | | | | | | | Cosmetics: Place curly brackets on a common line. Add MX25V512 as alias name to MX25L512. Add MX25V8005 as alias name to MX25L8005. Add erase block definitions for MX25L2005, MX25L4005, MX25L8005, MX25L1605 and change their status to TEST_OK_PRW where applicable. Corresponding to flashrom svn r738. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Reinauer <stepan@coresystems.de>
* Add initial support for flashing some NVIDIA graphics cardsUwe Hermann2009-09-306-6/+175
| | | | | | | | | | | | | | | | | | | | The new option is '-p gfxnvidia', rest of the interface is as usual. I tested a successful identify and read on a "RIVA TNT2 Model 64/Model 64 Pro" card for now, erase and write did NOT work properly so far! Please do not attempt to write/erase cards yet, unless you can recover! In addition to the NVIDIA handling code it was required to call programmer_shutdown() in a lot more places, otherwise the graphics card will be disabled in the init function, but never enabled again as the shutdown function is not called. The shutdown handling may be changed to use atexit() later. Corresponding to flashrom svn r737. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Luc Verhaegen <libv@skynet.be>
* This is the bitbanging SPI driver infrastructureCarl-Daniel Hailfinger2009-09-284-0/+198
| | | | | | | | | | | | | If you want support for a particular piece of hardware, just fill in a few functions in spi_bitbang_master_table. That's it. On top of this, the RayeR SPI flasher should be supportable in ~20 LOC. Tested, trace looks OK. Corresponding to flashrom svn r736. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Enable drkaiser programmer support in wiki outputUwe Hermann2009-09-251-1/+1
| | | | | | | Corresponding to flashrom svn r735. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Mark the following boards as OKUwe Hermann2009-09-253-3/+11
| | | | | | | | | | | | | | | | | | | | | | - ASUS M3A78-EM (reported by Christian Heinz <christian.ch.heinz@gmail.com>) http://www.flashrom.org/pipermail/flashrom/2009-September/000629.html - MSI MS-7368 (K9AG Neo2-Digital) (reported by Joshua Roys <roysjosh@gmail.com>) http://www.flashrom.org/pipermail/flashrom/2009-September/000632.html - GIGABYTE GA-MA770T-UD3P (reported by Kevin Sopp <baraclese@googlemail.com>) http://www.flashrom.org/pipermail/flashrom/2009-September/000529.html - Elitegroup P6VAP-A+ Tested by Uwe Hermann <uwe@hermann-uwe.de> on hardware. Maximum supported chip size in this board is 256 KB. Small changes in print.c were required to adjust for longer board names. Corresponding to flashrom svn r734. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Mark the SST SST49LF003A/B as read-testedPeter Lemenkov2009-09-251-1/+1
| | | | | | | | | See http://www.coreboot.org/pipermail/coreboot/2009-July/050675.html. Corresponding to flashrom svn r733. Signed-off-by: Peter Lemenkov <lemenkov@gmail.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Add chipset support for VIA VT82C596 by adding a PCI IDUwe Hermann2009-09-251-0/+1
| | | | | | | | | This is successfully tested by me on the Elitegroup P6VAP-A+ board. Corresponding to flashrom svn r732. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Switch SST49LF004A/B to block erase, remove the hack which simulated ↵Carl-Daniel Hailfinger2009-09-234-6/+24
| | | | | | | | | | | | | | | | | (unsupported) chip erase Annotate SST49LF004B quirks for TBL#. Add TEST_OK_PRW which is useful when a PREW chip gets a new erase routine. Change a few erase function prototypes to use unsigned int instead of int. Corresponding to flashrom svn r731. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Luc Verhaegen <libv@skynet.be>
* Change the status of the SST49LF020A to TEST_OK_PREWNils Jacobs2009-09-231-1/+1
| | | | | | | | | I tested it on the Wyse Winterm S50 see attached test results. Corresponding to flashrom svn r730. Signed-off-by: Nils Jacobs <njacobs8@hetnet.nl> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Enable flashrom on Wyse Winterm S50Nils Jacobs2009-09-231-0/+1
| | | | | | | | | | | | On the Wyse Winterm S50 lspci doesn`t show the cs5536 hostbridge and so flashrom doesn`t detect the cs5536. This patch is adding the cs5536 isa id [1022:2090] for chip detect. Corresponding to flashrom svn r729. Signed-off-by: Nils Jacobs <njacobs8@hetnet.nl> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* This enables flashing the Dell S1850 under Linux. Carl-Daniel Hailfinger2009-09-231-0/+12
| | | | | | | | | This code has been tested. Corresponding to flashrom svn r728. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Ronald G. Minnich <rminnich@gmail.com>
* The current ICH SPI preop handling is a hack which spews lots of warnings, ↵Carl-Daniel Hailfinger2009-09-183-41/+47
| | | | | | | | | | | | | | | | | | but still yields correct results With the multicommand infrastructure I introduced in r645, it became possible to integrate ICH SPI preopcodes cleanly into the flashrom design. The new code checks for every opcode in a multicommand array if it is a preopcode. If yes, it checks if the next opcode is associated with that preopcode and in that case it simply runs the opcode because the correct preopcode will be run automatically before the opcode. Corresponding to flashrom svn r727. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: FENG Yu Ning <fengyuning1984@gmail.com>
* Fix copy-paste errors by s/CONFIG_PRINT_WIKI/PRINT_WIKI_SUPPORT/Uwe Hermann2009-09-181-6/+6
| | | | | | | | | Trivial, and build-tested. Corresponding to flashrom svn r726. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Compile out wiki output on request and move wiki stuff into a separate fileCarl-Daniel Hailfinger2009-09-164-524/+573
| | | | | | | | | | | | | This is useful for libflashrom (you don't need wiki output in a coreboot payload). Wiki output is now disabled by default. If you want to enable it, run make CONFIG_PRINT_WIKI=yes Corresponding to flashrom svn r725. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Reinauer <stepan@coresystems.de>
* Allow to exclude each of the external programmer drivers from being compiled inCarl-Daniel Hailfinger2009-09-166-17/+97
| | | | | | | | | | | | | | | Example make commandline if you want only internal programmers: make CONFIG_FT2232SPI=no CONFIG_SERPROG=no CONFIG_NIC3COM=no CONFIG_SATASII=no CONFIG_DRKAISER=no CONFIG_DUMMY=no Of course, all of the CONFIG_* symbols can be mixed and matched as needed. CONFIG_FT2232SPI is special because even if it is enabled, make will check if the headers are available and skip it otherwise. Corresponding to flashrom svn r724. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Reinauer <stepan@coresystems.de>
* Fix all remaining issues reported by LLVM/clang's scan-buildStefan Reinauer2009-09-163-27/+28
| | | | | | | Corresponding to flashrom svn r723. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com>
* Fix some of the issues reported by LLVM/clang's scan-buildStefan Reinauer2009-09-164-27/+20
| | | | | | | | | Corresponding to flashrom svn r722. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> This commit fixes only some of the issues, those that were Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Mark Macronix MX29F001B as OK, tested by me on hardwareUwe Hermann2009-09-091-1/+1
| | | | | | | Corresponding to flashrom svn r721. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Replace pseudonym in drkaiser.c with real nameJoerg Fischer2009-09-091-1/+1
| | | | | | | Corresponding to flashrom svn r720. Signed-off-by: Joerg Fischer <turboj@gmx.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Store block sizes and corresponding erase functions in struct flashchipCarl-Daniel Hailfinger2009-09-058-33/+130
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | I decided to fill in the info for a few chips to illustrate how this works both for uniform and non-uniform sector sizes. struct eraseblock{ int size; /* Eraseblock size */ int count; /* Number of contiguous blocks with that size */ }; struct eraseblock doesn't correspond with a single erase block, but with a group of contiguous erase blocks having the same size. Given a (top boot block) flash chip with the following weird, but real-life structure: top 16384 8192 8192 32768 65536 65536 65536 65536 65536 65536 65536 bottom we get the following encoding: {65536,7},{32768,1},{8192,2},{16384,1} Although the number of blocks is bigger than 4, the number of block groups is only 4. If you ever add some flash chips with more than 4 contiguous block groups, the definition will not fit into the 4-member array anymore and gcc will recognize that and error out. No undetected overflow possible. In that case, you simply increase array size a bit. For modern flash chips with uniform erase block size, you only need one array member anyway. Of course data types will need to be changed if you ever get flash chips with more than 2^30 erase blocks, but even with the lowest known erase granularity of 256 bytes, these flash chips will have to have a size of a quarter Terabyte. I'm pretty confident we won't see such big EEPROMs in the near future (or at least not attached in a way that makes flashrom usable). For SPI chips, we even have a guaranteed safety factor of 4096 over the maximum SPI chip size (which is 2^24). And if such a big flash chip has uniform erase block size, you could even split it among the 4 array members. If you change int count to unsigned int count, the storable size doubles. So with a split and a slight change of data type, the maximum ROM chip size is 2 Terabytes. Since many chips have multiple block erase functions where the eraseblock layout depends on the block erase function, this patch couples the block erase functions with their eraseblock layouts. struct block_eraser { struct eraseblock{ unsigned int size; /* Eraseblock size */ unsigned int count; /* Number of contiguous blocks with that size */ } eraseblocks[NUM_ERASEREGIONS]; int (*block_erase) (struct flashchip *flash, unsigned int blockaddr, unsigned int blocklen); } block_erasers[NUM_ERASEFUNCTIONS]; Corresponding to flashrom svn r719. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Reinauer <stepan@coresystems.de>
* Update probe timings for dozens of flash chipsUdu Ogah2009-09-051-38/+38
| | | | | | | | Corresponding to flashrom svn r718. Signed-off-by: Udu Ogah <putlinuxonit@gmail.com> Acked-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Unify some probe functions that basically correspond to probe_jedec()Carl-Daniel Hailfinger2009-09-054-101/+21
| | | | | | | | | | | | | | | | | | | | | | Use the correct reset sequence for 82802AB. Detailed explanation: The reset sequence before ID reading was correct, so ID always worked. But the reset sequence after ID reading was a copy-paste leftover from probe_jedec and didn't have any effect. I dug up flash_and_burn from the freebios-v1 tree and found out that 82802ab.c was indeed a copy of jedec.c with lots of experimental unannotated #if 0 and #if 1. About the wait_82802ab change: Before the patch, wait_82802ab entered read status mode, switched to ID mode, then tried an incorrect and unsupported JEDEC command to exit ID mode. Nobody ever saw that this failed because all subsequent function calls had the correct reset sequence at the beginning. With the patch, wait_82802ab enters read status mode, then switches back to read mode with the official reset command. Corresponding to flashrom svn r717. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Reinauer <stepan@coresystems.de>
* Not all systems have svnversion installedCarl-Daniel Hailfinger2009-09-051-1/+1
| | | | | | | | | Fall back to svn info if svnversion fails. Corresponding to flashrom svn r716. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Fix strict aliasing in serprogCarl-Daniel Hailfinger2009-09-051-6/+5
| | | | | | | | | | Initialize the sockaddr,sockaddr_in union directly instead of running memset later. Corresponding to flashrom svn r715. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Reinauer <stepan@coresystems.de>
* Fix for gcc 4.4 strict aliasing rulesStefan Reinauer2009-09-041-3/+3
| | | | | | | Corresponding to flashrom svn r714. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Add drkaiser.c which was accidentally omitted in the last commitUwe Hermann2009-09-021-0/+79
| | | | | | | Corresponding to flashrom svn r713. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Add support for parallel flash on Dr. Kaiser PC-Waechter PCI devicesTURBO J2009-09-027-11/+41
| | | | | | | | | | | | | | The vendor sold different designs under that name, the patch works with the one that has an Actel FPGA as PCI-to-Flash bridge. The Flash chip is a "Macronix MX29F001B" (128 KB, parallel) soldered directly to the PCB. Flash operations (PROBE, READ, ERASE, WRITE) work as expected. Corresponding to flashrom svn r712. Signed-off-by: TURBO J <turboj@gmx.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Standardize on using __func__ instead of __FUNCTION__Uwe Hermann2009-09-0216-23/+23
| | | | | | | | | | | | | | | The __func__ variant is standardized in C99 and recommended to be used instead of __FUNCTION__ in the gcc info page. Only _very_ old versions of gcc did not know about __func__, but we've been using both __func__ and __FUNCTION__ for a long while now, and nobody complained about this, so all our users seem to use recent enough compilers. Corresponding to flashrom svn r711. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Stefan Reinauer <stepan@coresystems.de>
* Flashrom 0.9.1Carl-Daniel Hailfinger2009-09-021-1/+1
| | | | | | | | | | | Please refer to the release notes for a high-level overview of all the amazing changes and added features since 0.9.0. Corresponding to flashrom svn r709. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
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