aboutsummaryrefslogtreecommitdiffstats
Commit message (Collapse)AuthorAgeFilesLines
* Add support for SPI chips on ICH9Dominik Geyer2008-05-165-3/+484
| | | | | | | | | This is done by using the generic SPI interface. Corresponding to flashrom svn r239 and coreboot v2 svn r3325. Signed-off-by: Dominik Geyer <dominik.geyer@kontron.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* IT8716F: Enable writes if decoding of any SPI addresses is enabledCarl-Daniel Hailfinger2008-05-161-0/+6
| | | | | | | Corresponding to flashrom svn r238 and coreboot v2 svn r3324. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Peter Stuge <peter@stuge.se>
* Print detailed status register information for SST25VF series flashCarl-Daniel Hailfinger2008-05-151-0/+4
| | | | | | | Corresponding to flashrom svn r237 and coreboot v2 svn r3323. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Peter Stuge <peter@stuge.se>
* Lots of new SST flash chip IDsCarl-Daniel Hailfinger2008-05-152-1/+17
| | | | | | | | | | Only a subset has been added to flashchips.c, but the IDs in flash.h will make lookups easier if anybody wants to add support for them. Corresponding to flashrom svn r236 and coreboot v2 svn r3321. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Add support for the JEDEC RESCarl-Daniel Hailfinger2008-05-154-33/+82
| | | | | | | | | | | | | | | | | | Add support for the JEDEC RES (Read Electronic Signature and Resume from Powerdown) SPI command to identify older SPI chips which can't handle JEDEC RDID. Since RES gives a one-byte identifier which is shared among many different vendors and even different sizes, we want to match RES as a last resort if RDID returns 0xff 0xff 0xff. Corresponding to flashrom svn r235 and coreboot v2 svn r3320. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Peter Stuge <peter@stuge.se> This is a heavily reworked version of a patch by Fredrik Tolf, which was Signed-off-by: Fredrik Tolf <fredrik@dolda2000.com>
* Add more infrastructure for flashrom ICH9 supportCarl-Daniel Hailfinger2008-05-143-27/+46
| | | | | | | Corresponding to flashrom svn r234 and coreboot v2 svn r3314. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Reinauer <stepan@coresystems.de>
* Add the Intel 6300ESB as known chipset to the chipset struct enablesClaus Gindhart2008-05-141-0/+1
| | | | | | | Corresponding to flashrom svn r233 and coreboot v2 svn r3310. Signed-off-by: Claus Gindhart <claus.gindhart@kontron.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Fix crash caused by division by zero for unknown flash chipsCarl-Daniel Hailfinger2008-05-141-5/+5
| | | | | | | Corresponding to flashrom svn r232 and coreboot v2 svn r3309. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Check the JEDEC vendor ID for correct parityCarl-Daniel Hailfinger2008-05-143-1/+17
| | | | | | | | | | | | Flash chips which can be detected by JEDEC probe routines all have vendor IDs with correct parity. Use a parity check as additional hint whether a vendor ID makes sense. Note: Device IDs have no parity requirements whatsoever. Corresponding to flashrom svn r231 and coreboot v2 svn r3308. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Peter Stuge <peter@stuge.se>
* Add lots of ATMEL SPI flash chips to flash.hCarl-Daniel Hailfinger2008-05-142-6/+19
| | | | | | | | | Add a few flashchips already mentioned in flash.h to flashchips.c Corresponding to flashrom svn r230 and coreboot v2 svn r3306. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Move all IT87xx specific SPI routines from spi.c to a separate file it87spi.cCarl-Daniel Hailfinger2008-05-134-224/+285
| | | | | | | | | No behavioural changes, but greatly improved SPI abstraction. Corresponding to flashrom svn r229 and coreboot v2 svn r3305. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Peter Stuge <peter@stuge.se>
* Move the SPI #defines from spi.c to spi.hCarl-Daniel Hailfinger2008-05-132-60/+89
| | | | | | | | | This patch has no code changes. Corresponding to flashrom svn r228 and coreboot v2 svn r3302. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Peter Stuge <peter@stuge.se>
* Change the SPI parts of flashrom to prepare for a merge of ICH9 SPI supportCarl-Daniel Hailfinger2008-05-131-17/+17
| | | | | | | | | In theory, this patch has no behaviour changes. Corresponding to flashrom svn r227 and coreboot v2 svn r3301. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Peter Stuge <peter@stuge.se>
* MX25L3205 and W25x40 have been confirmed to probe/read/erase/write OK by ↵Carl-Daniel Hailfinger2008-05-122-3/+4
| | | | | | | | | | | Harald Gutmann SST39VF040 has been confirmed to probe OK by misi e. Corresponding to flashrom svn r226 and coreboot v2 svn r3300. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Add SST39VF512, SST39VF010, SST39VF040 supportCarl-Daniel Hailfinger2008-05-122-0/+7
| | | | | | | | | | The SST39LF series has the same IDs. Add short AMIC vendor ID to flashrom. Corresponding to flashrom svn r225 and coreboot v2 svn r3299. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Peter Stuge <peter@stuge.se>
* Improve flashrom SPI abstraction, second stepCarl-Daniel Hailfinger2008-05-101-18/+18
| | | | | | | | | | | | | This paves the way to have a fully generic generic_spi_command without knowledge about any SPI controller. The third step would be calling SPI controller functions via a function pointer. Corresponding to flashrom svn r224 and coreboot v2 svn r3296. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Peter Stuge <peter@stuge.se>
* Rename generic_spi_*() functions to spi_*()Peter Stuge2008-05-103-67/+67
| | | | | | | | | This is a very early step toward cleaning up SPI code in flashrom. Corresponding to flashrom svn r223 and coreboot v2 svn r3295. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Probe for up to 3 flash chipsClaus Gindhart2008-05-081-3/+19
| | | | | | | | | | | | | | | | | | | Currently there is an ongoing technology migration from LPC/FWH to SPI chips. For this reason some boards have multiple chips of different technologies onboard. This patch makes flashrom probe for up to 3 chips and if more than one chip is found flashrom exits, asking the user to specify -c. [root@localhost src]# ./flashrom ... Multiple flash chips were detected: SST49LF008A M25P16@ICH9 Please specify which chip to use with the -c <chipname> option. [root@localhost src]# Corresponding to flashrom svn r222 and coreboot v2 svn r3291. Signed-off-by: Claus Gindhart <claus.gindhart@kontron.com> Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Claus Gindhart <claus.gindhart@kontron.com>
* Add a tested bitmap field to the flash chip tablePeter Stuge2008-05-033-101/+150
| | | | | | | | | | | | | | | Two bits indicate OK and BAD for each operation PROBE READ ERASE WRITE. 8 bits out of 32 are in use now. No bits set means nothing has been tested. For chips with at least one operation that is not tested or not working, the user is asked to email a report to a special email adress so that the table can be updated. All chips are TEST_UNTESTED for now. Corresponding to flashrom svn r221 and coreboot v2 svn r3277. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Enable ROM decode range to 1MB for vt8237rBari Ari2008-04-291-0/+3
| | | | | | | Corresponding to flashrom svn r220 and coreboot v2 svn r3275. Signed-off-by: Bari Ari <bari@onelabs.com> Acked-by: Stefan Reinauer <stepan@coresystems.de>
* Separate ST M50FLW support from generic JEDEC codeClaus Gindhart2008-04-284-10/+307
| | | | | | | | | | | | | | | | The generic jedec.c does not work for the ST M50FLW flash devices, because they need an unlock command first. For this reason, ST M50FLW support is moved to a new HW support module, because any change in jedec.c would bear the risk to cause problems with the already supported devices. It's already tested with ST M50FLW080A; the other chips of this family i dont have available, so i couldnt test it. Corresponding to flashrom svn r219 and coreboot v2 svn r3274. Signed-off-by: Claus Gindhart <claus.gindhart@kontron.com> Acked-by: Stefan Reinauer <stepan@coresystems.de>
* Handle NULL probe, erase and write function pointers in the flashchips tablePeter Stuge2008-04-281-1/+15
| | | | | | | | | The read pointer was already checked properly. Corresponding to flashrom svn r218 and coreboot v2 svn r3273. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Stefan Reinauer <stepan@coresystems.de>
* 82802ab: touch only blocks that need updatingClaus Gindhart2008-04-241-7/+27
| | | | | | | | | | | | | | | Flash pages, which where excluded from updating using the exclude or the layout option, as well as areas, whose flash contents already contain the desired data, will be skipped. These ensures absolute data security of critical areas (BIOS boot block), e.g. against a sudden power off or a CPU hangup during flashing. As a nice side effect, it speeds up the flash process, if the BIOS to be flashed is very similar to the version in flash. Corresponding to flashrom svn r217 and coreboot v2 svn r3260. Signed-off-by: Claus Gindhart <claus.gindhart@kontron.com> Acked-by: Stefan Reinauer <stepan@coresystems.de>
* ST M50FW016 and ST M50FW040 support the 82802ab command set, not jedecEd Swierk2008-04-071-2/+2
| | | | | | | Corresponding to flashrom svn r216 and coreboot v2 svn r3221. Signed-off-by: Ed Swierk <eswierk@arastra.com> Acked-by: Joseph Smith <joe@smittys.pointclark.net>
* Add ICH9 detectionCarl-Daniel Hailfinger2008-03-181-1/+8
| | | | | | | | | Straight from the datasheet, untested. Corresponding to flashrom svn r215 and coreboot v2 svn r3167. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* OopsStefan Reinauer2008-03-181-0/+206
| | | | | | | | | | | | Forgot to add the file. Support for the Winbond W39V080FA series of chips. Support for flashing on the Kontron 986LCD-M board. Corresponding to flashrom svn r214 and coreboot v2 svn r3166. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Support for the Winbond W39V080FA series of chipsStefan Reinauer2008-03-175-3/+50
| | | | | | | | | Support for flashing on the Kontron 986LCD-M board. Corresponding to flashrom svn r213 and coreboot v2 svn r3165. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Check whether SST FWH chip was successfully erased on flashchip -E, tooStefan Reinauer2008-03-161-9/+11
| | | | | | | Corresponding to flashrom svn r212 and coreboot v2 svn r3153. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de>
* Sort list of flash chips alphabetically, add commentUwe Hermann2008-03-161-60/+68
| | | | | | | Corresponding to flashrom svn r211 and coreboot v2 svn r3152. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Remove nasty warning that happened due to our vendor detectionStefan Reinauer2008-03-151-2/+5
| | | | | | | | Corresponding to flashrom svn r210 and coreboot v2 svn r3151. mechanism. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de>
* Re-add code erroneously removed in r3140Uwe Hermann2008-03-143-195/+101
| | | | | | | Corresponding to flashrom svn r209 and coreboot v2 svn r3146. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Changes M50FW080 to use 82802ab.c instead of jedec.cJoseph Smith2008-03-141-1/+1
| | | | | | | | | This fixes the problem of not being able to erase the chip. Corresponding to flashrom svn r208 and coreboot v2 svn r3145. Signed-off-by: Joseph Smith <joe@smittys.pointclark.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Prepare for ICH7/ICH8 SPI support by adding some debugging for all ICH* chipsetsCarl-Daniel Hailfinger2008-03-141-9/+62
| | | | | | | | | | | | | | Functionality (except printing) should be unchanged. Corresponding to flashrom svn r207 and coreboot v2 svn r3144. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Ward says: This code detects the ICH8 chipset on my laptop, and it appears to use SPI. Acked-by: Ward Vandewege <ward@gnu.org>
* Fix broken flashrom buildUwe Hermann2008-03-141-1/+1
| | | | | | | Corresponding to flashrom svn r206 and coreboot v2 svn r3142. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Fix up one forgotten revert in r3140Carl-Daniel Hailfinger2008-03-141-2/+2
| | | | | | | Corresponding to flashrom svn r205 and coreboot v2 svn r3141. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Revert the delete of 82802ab.c in r3137Carl-Daniel Hailfinger2008-03-145-109/+381
| | | | | | | Corresponding to flashrom svn r204 and coreboot v2 svn r3140. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Also print the chip vendor name in --list-supported outputUwe Hermann2008-03-134-244/+151
| | | | | | | | | | | | Cosmetic changes in some files, partly bending the 80-characters-per-line rule in this special case, as the 80-character-limited version looks equally crappy even in an 80x25 console/xterm, so let's make it at least look good in a high-resolution xterm. Corresponding to flashrom svn r203 and coreboot v2 svn r3139. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Also print the required -m option in --list-supported outputUwe Hermann2008-03-131-2/+10
| | | | | | | Corresponding to flashrom svn r202 and coreboot v2 svn r3138. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Drop 82802ab.c as it is identical to sharplhf00l04.cCarl-Daniel Hailfinger2008-03-134-191/+13
| | | | | | | Corresponding to flashrom svn r201 and coreboot v2 svn r3137. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Peter Stuge <peter@stuge.se>
* Drop the useless rom.layout fileUwe Hermann2008-03-121-3/+0
| | | | | | | | | | It's just an example, likely never been used in the last few years, and the contents are available in the README already anyway. Corresponding to flashrom svn r200 and coreboot v2 svn r3134. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Ward Vandewege <ward@gnu.org>
* Add --list-supported option which lists the supported ROM chips, chipsets, ↵Uwe Hermann2008-03-125-7/+64
| | | | | | | | | and mainboards Corresponding to flashrom svn r199 and coreboot v2 svn r3133. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Ward Vandewege <ward@gnu.org>
* Add missing license header to layout.cUwe Hermann2008-03-041-0/+20
| | | | | | | | | | The file was written by Stefan Reinauer for coresystems GmbH in 2005, as confirmed on IRC. Corresponding to flashrom svn r198 and coreboot v2 svn r3126. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Stefan Reinauer <stepan@coresystems.de>
* Add board_enable for Artec Group DBE61 and DBE62Mart Raudsepp2008-02-201-0/+70
| | | | | | | | | | | Also add a comment about NULL subsystem IDs leaving the board entry out of auto-detection logic. Corresponding to flashrom svn r197 and coreboot v2 svn r3110. Signed-off-by: Mart Raudsepp <mart.raudsepp@artecdesign.ee> Acked-by: Luc Verhaegen <libv@skynet.be> Acked-by: Stefan Reinauer <stepan@coresystems.de>
* Fix compilation with custom CFLAGSClark Rawlins2008-02-141-1/+3
| | | | | | | | | | | | | | | | With this small change it is possible to build flashrom again when specifying custom CFLAGS/LDFLAGS from the make command line like. make CFLAGS="..." LDFLAGS="..." I need to do this when building flashrom in a cross compiler environment like buildroot for a foreign target. Corresponding to flashrom svn r196 and coreboot v2 svn r3102. Signed-off-by: Clark Rawlins <clark@bit63.org> Acked-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Further cleanups to enable_flash_cs5536Mart Raudsepp2008-02-111-5/+2
| | | | | | | | | | | | | | | | - Remove the "enable write to flash" message, as the caller appears to already report that. - Move the 'modprobe msr' suggestions to the first lseek64 error handling, as we get an error there already. - Rename a perror string from "read" to "read msr", as we use the latter already in this function for another read. Corresponding to flashrom svn r195 and coreboot v2 svn r3101. Signed-off-by: Mart Raudsepp <mart.raudsepp@artecdesign.ee> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Add board enable for VIA EPIA SPLuc Verhaegen2008-02-091-1/+25
| | | | | | | | Corresponding to flashrom svn r194 and coreboot v2 svn r3099. Signed-off-by: Luc Verhaegen <libv@skynet.be> Acked-by: Corey Osgood <corey.osgood@gmail.com> Acked-by: Peter Stuge <peter@stuge.se>
* Improve error handling and make RCONF_DEFAULT_MSR address be a constantMart Raudsepp2008-02-081-26/+52
| | | | | | | | | Also, move a big code comment to the top of enable_flash_cs5536(). Corresponding to flashrom svn r193 and coreboot v2 svn r3098. Signed-off-by: Mart Raudsepp <mart.raudsepp@artecdesign.ee> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Write enable flash chips attached to CS3 of CS5536 chipsets (AMD Geode)Mart Raudsepp2008-02-081-12/+33
| | | | | | | | | | | | | | | | This implements support for devices using AMD Geode companion chip CS5536 that have the Boot ROM on NOR flash that is directly connected to FLASH_CS3 (Boot Flash Chip Select). We need to write enable it in the NORF_CTL MSR register for flashrom to be able to write to it, including JEDEC probe commands. This patch allows us to stop using AMD gx_utils.ko for BIOS flashing on the DBE61. Corresponding to flashrom svn r192 and coreboot v2 svn r3097. Signed-off-by: Mart Raudsepp <mart.raudsepp@artecdesign.ee> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Handle JEDEC JEP106W continuation codes in SPI RDIDCarl-Daniel Hailfinger2008-02-063-7/+40
| | | | | | | | | | | | | Some vendors like Programmable Micro Corp (PMC) need this. Both the serial and parallel flash JEDEC detection routines would benefit from a parity/sanity check of the vendor ID. Will do this later. Add support for the PMC Pm25LV family of SPI flash chips. Corresponding to flashrom svn r191 and coreboot v2 svn r3091. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Chris Lingard <chris@stockwith.co.uk>
* Make the vendor name optional in the -m flashrom parameter when there's only ↵Peter Stuge2008-01-274-35/+51
| | | | | | | | | | | | one board name that matches The full syntax still works, and is required when two vendors have boards with the same names. Corresponding to flashrom svn r190 and coreboot v2 svn r3082. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Stefan Reinauer <stepan@coresystems.de>
generated by cgit v1.2.3 (git 2.25.1) at 2024-07-07 13:31:22 +0000