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* tests: Convert read chip tests to libflashrom APIAnastasia Klimchuk2022-01-191-2/+11
| | | | | | | | | | | | | As a part of effort to convert command line (and everything else) to be libflashrom users, chip tests need to be converted as well. TEST=ninja test Change-Id: I4493d4f269595783830c39a720b0a8963eab9daa Signed-off-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/61138 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
* tests: Convert erase chip tests to libflashrom APIAnastasia Klimchuk2022-01-191-2/+3
| | | | | | | | | | | | | As a part of effort to convert command line (and everything else) to be libflashrom users, chip tests need to be converted as well. TEST=ninja test Change-Id: I38529a6b4d79882f50068b3628089b178dbe0a50 Signed-off-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/61137 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
* dediprog: wait for spi bulk read xfers to finishRick Altherr2022-01-141-1/+1
| | | | | | | | | | | | | | | | | | | | | dediprog_bulk_read_poll()'s finish argument allows it to be used in two distinct cases: where dediprog_bulk_read_poll will be called as part of a loop (finish=0) and where dediprog_bulk_read_poll should wait for all outstanding transfers to finish (finish=1). In both cases, dediprog_bulk_read_poll() calls libusb to process events with a 10 second timeout. After dediprog_spi_bulk_read() has queued the last transfers, it calls dediprog_bulk_read_poll() with finish=0 when it should be finish=1. finish=0 just happens to work because frequently the transfers finish in the 10 second timeout. Signed-off-by: Rick Altherr <rick@oxidecomputer.com> Change-Id: If7cb541742c8620358c8e04275d8316131b2d1ab Reviewed-on: https://review.coreboot.org/c/flashrom/+/60087 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Nico Huber <nico.h@gmx.de>
* linux_mtd: check ioctl() return value properlyNikolai Artemiev2022-01-141-3/+5
| | | | | | | | | | | | | | | | Make the linux_mtd driver treat any negative return value from the MEMERASE ioctl as an error. Previously it only treated -1 as an error. BUG=b:213561594,b:210973586,b:182223106 BRANCH=none TEST=builds Change-Id: I40cfbdee2ab608fbe6c17d9cac6ec53ff224d9a4 Signed-off-by: Nikolai Artemiev <nartemiev@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/60996 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
* layout: Hoist get_region_range() into libflashrom APIEdward O'Callaghan2022-01-116-16/+28
| | | | | | | | | | | | | | | | | | | | While using the libflashrom API to read specific regions there is no currently no general way to find the offset into the read buffer of the expected region. flashrom_layout_include_region() probably should have returned the region offset and size if it was included. However to avoid a change in API signature we can instead hoist up get_region_range() into the API to be called after. BUG=b:207808292 TEST=`make` && tested in porting cbfstool use-case. Change-Id: I8cf95b5eaec943a51d0ea668f26a56bf6d6b4446 Signed-off-by: Edward O'Callaghan <quasisec@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/60881 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Sam McNally <sammc@google.com>
* it8212: remove unused rget_io_perms()Thomas Heijligen2022-01-101-4/+0
| | | | | | | | | | | | | The it8212 programmer does not use x86 IO Ports. Remove the dependency to it. Change-Id: Iab859fb6be6cab094c9c6ce4b3e8eac0e5ff84ab Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/60869 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Felix Singer <felixsinger@posteo.net> Reviewed-by: David Hendricks <david.hendricks@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* satasii: remove unused rget_io_perms()Thomas Heijligen2022-01-102-5/+0
| | | | | | | | | | | | The satasii programmer does not use x86 IO Ports. Remove the dependency to it. Change-Id: I54d65561ff024d3c181d11c6518a4612c2ab0399 Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/60848 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Felix Singer <felixsinger@posteo.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* ogp_spi: remove unused rget_io_perms()Thomas Heijligen2022-01-102-5/+0
| | | | | | | | | | | | The ogp_spi programmer does not use x86 IO Ports. Remove the dependency to it. Change-Id: I1f3f34e33f77159fa0cdea150e1f408ce9d943f0 Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/60847 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Felix Singer <felixsinger@posteo.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* nicintel_spi: remove unused rget_io_perms()Thomas Heijligen2022-01-102-5/+0
| | | | | | | | | | | | The nicintel_spi programmer does not use x86 IO Ports. Remove the dependency to it. Change-Id: I3e7451eceb1f01de21da934c9559dbf2f06e7e54 Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/60846 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Felix Singer <felixsinger@posteo.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* nicintel_eeprom: remove unused rget_io_perms()Thomas Heijligen2022-01-102-5/+0
| | | | | | | | | | | | The nicintel_eeprom programmer does not use x86 IO Ports. Remove the dependency to it. Change-Id: I5fd42572fd29f5d7fd749c2836eac3e68c947946 Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/60845 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Felix Singer <felixsinger@posteo.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* nicintel: remove unused rget_io_perms()Thomas Heijligen2022-01-102-8/+0
| | | | | | | | | | | | The nicintel programmer does not use x86 IO Ports. Remove the dependency to it. Change-Id: Ibe609ff8f8fdbdf2a7de8e1922325ca4ad56a9e7 Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/60844 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Felix Singer <felixsinger@posteo.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* gfxnvidia: remove unused rget_io_perms()Thomas Heijligen2022-01-102-5/+0
| | | | | | | | | | | | The gfxnvidia programmer does not use x86 IO Ports. Remove the dependency to it. Change-Id: I1f0341390ccb698bc435760f4ead7de54e429a6e Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/60843 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Felix Singer <felixsinger@posteo.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* drkaiser: remove unused rget_io_perms()Thomas Heijligen2022-01-102-5/+0
| | | | | | | | | | | | The drkaiser programmer does not use x86 IO Ports. Remove the dependency to it. Change-Id: I86bad947298a1166ff1e768f7d0b75a90e574696 Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/60842 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Felix Singer <felixsinger@posteo.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* atavia: remove unused rget_io_perms()Thomas Heijligen2022-01-102-5/+0
| | | | | | | | | | | | The atavia programmer does not use x86 IO Ports. Remove the dependency to it. Change-Id: I1fa866b3b07adf5f7a51d58f53d6cad1f88d7210 Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/60841 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Felix Singer <felixsinger@posteo.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* chipset_enable.c: Add TGP-H IDsTim Crawford2022-01-051-0/+9
| | | | | | | | | | | | | | Add IDs for: H510, B560, H570, Q570, Z590, W580, HM570, QM570, WM590 Tested on system76/oryp8 (HM570). flashrom is able to read the image using the internal programmer. Change-Id: I96f63253d42578151f99dcbb42347afecc03f49d Signed-off-by: Tim Crawford <tcrawford@system76.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/57533 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Benjamin Doron <benjamin.doron00@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* hwaccess_x86_msr: fix build for FreeBSDThomas Heijligen2022-01-051-0/+7
| | | | | | | | | | | | Add missing includes for FreeBSD Change-Id: I2045345878392436b0ea4d6bd4f2896edc645673 Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/60342 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Idwer Vollering <vidwer@gmail.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
* Makefile: list dependencies for RAW_MEM_ACCESS, X86_PORT_IO, X86_MSRThomas Heijligen2021-12-221-9/+48
| | | | | | | | | | | List all programmers which depend on the respective hwaccess features. This is the base for a precise feature selecting in the build system. Change-Id: I588f698780b5acd65084346bcef781cbfd1203ea Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/60114 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* physmap: rename to hwaccess_physmap, create own headerThomas Heijligen2021-12-2224-12/+49
| | | | | | | | | | Line up physmap with the other hwaccess related code. Change-Id: Ieba6f4e94cfc3e668fcb8b3c978de5908aed2592 Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/60113 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* hwaccess physmap: move x86 msr related code into own filesThomas Heijligen2021-12-229-359/+405
| | | | | | | | | | | | Allow x86 msr related code to be compiled independent from memory mapping functionality. This enables for a better selection of needed hardware access types. Change-Id: Idc9ce9df3ea1e291ad469de59467646b294119c4 Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/60111 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* hwaccess: move x86 port I/O related code into own filesThomas Heijligen2021-12-2231-82/+122
| | | | | | | | | | | | Allow port I/O related code to be compiled independent from memory mapping functionality. This enables for a better selection of needed hardware access types. Change-Id: I372b4a409f036da766c42bc406b596bc41b0f75a Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/60110 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* pci.h: move include into own wrapperThomas Heijligen2021-12-2224-18/+47
| | | | | | | | | | | Split the include of hwaccess and libpci. There is no need to have pci.h included in hwaccess. Change-Id: Ibf00356f0ef5cc92e0ec99f8fe5cdda56f47b166 Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/58883 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* Makefile: Make pkg-config mandatory to find libusb1Thomas Heijligen2021-12-222-56/+19
| | | | | | | | | | | | Use `make HAS_LIBUSB1=yes/no` to override the pkg-config detection and `CONFIG_LIBUSB1_CFLAGS` and `CONFIG_LIBUSB1_LDFLAGS` to set cflags and ldflags manually. Change-Id: I4f24be647d25dde24c41514f8964b7134205867c Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/59049 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* Makefile: Make pkg-config mandatory to find libjaylinkThomas Heijligen2021-12-222-48/+20
| | | | | | | | | | | | Use `make HAS_LIBJAYLINK=yes/no` to override the pkg-config detection and `CONFIG_LIBJAYLINK_CFLAGS` and `CONFIG_LIBJAYLINK_LDFLAGS` to set cflags and ldflags manually. Change-Id: I99df547046bb9820ab502f89f6d4452c1bc0cfd4 Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/59048 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* Makefile: Rework NI-845x detectionThomas Heijligen2021-12-222-65/+36
| | | | | | | | | | | | | | | Since the NI-845x is a Windows only proprietary library, disable it by default. Use `HAS_LIB_NI845X=yes` to enable it. The default search path is `${PROGRAMFILES}\National Instruments\NI-845x\MS Visual C` and can be overwritten by `CONFIG_NI845X_LIBRARY_PATH`. Use `CONFIG_LIB_NI845X_CFLAGS` and `CONFIG_LIB_NI845X_LDFLAGS` for setting the cflags and ld flags manually. Change-Id: I918c3605a5ac168708a6a10fd92ee2a1aae9729b Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/59047 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* Makefile: Make pkg-config mandatory to find libftdi1Thomas Heijligen2021-12-223-59/+57
| | | | | | | | | | | | Use `make HAS_LIBFTDI1=yes/no` to override the pkg-config detection and `CONFIG_LIBFTDI1_CFLAGS` and `CONFIG_LIBFTDI1_LDFLAGS` to set cflags and ldflags manually. Change-Id: I41f5186d9f3e063c12c8c6eea888d0b0bf534259 Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/58623 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* flashrom.8.tmpl: document W25Q128FV is emulated by dummyflasherSergii Dmytruk2021-12-171-0/+2
| | | | | | | | | | | It was absent from the list of emulated chips. Change-Id: I50f6cd6c5d853d6c70921e8027ada52d27982708 Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/59811 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
* flashrom.8.tmpl: remove outdated warning about v1.0Sergii Dmytruk2021-12-171-5/+0
| | | | | | | | | | This section is rather outdated and should be dispensed with. Change-Id: Id7e0ce412901ccb27124a9958d5ef214ab289518 Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/59408 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* flashrom.c: Validate before allocate in verify_range()Edward O'Callaghan2021-12-151-10/+8
| | | | | | | | | | | | | | | Simplify a goto away for free'ing a buffer by validating before attempting to allocate. BUG=none TEST=builds Change-Id: Iae886f203d1c59ae9a89421f7483a4ec3f747256 Signed-off-by: Edward O'Callaghan <quasisec@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/59372 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
* flashchips: Add W25Q64JVSimon Buhrow2021-12-092-0/+41
| | | | | | | | | | I have successfully tested it with FT2232H-programmer. Change-Id: Ia9a32146b225eca66e9a6bfef45be5f2b24aef46 Signed-off-by: Simon Buhrow <simon.buhrow@posteo.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/58971 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* tests: Add init-shutdown test for raiden_debug_spiAnastasia Klimchuk2021-11-296-5/+208
| | | | | | | | | | | | | | | | | This patch adds a test for raiden_debug_spi and lots of libusb wraps. libusb.h becomes required for tests to build and run, since new tests are using libusb structs in depth and opaque symbols not sufficient anymore. BUG=b:181803212 TEST=builds and ninja test Change-Id: I880a8637ab02de179df9169c1898230bce4dc1c7 Signed-off-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/57918 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
* tests: Add wraps for __xstat/__fxstat variants of stat/fstatAnastasia Klimchuk2021-11-172-0/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | __xstat and __fxstat variants of stat/fstat are invoked under chromium chroot. For all existing tests it is sufficient for stat/fstat to "do nothing, return 0", so new wraps do just that. Test which needs __xstat: linux_mtd lifecycle. Tests which need __fxstat: read_chip_test_success read_chip_with_dummyflasher_test_success write_chip_test_success write_chip_with_dummyflasher_test_success Without this patch tests above fail under chromium chroot. BUG=b:181803212 TEST=running tests on three different environments, 1) stat64/fstat64 (ninja tests in upstream tree) 2) stat64/fstat64 (ninja tests in chromium tree) 2) __xstat64/__fxstat64 (emerge with tests in chromium tree) Change-Id: I4c5c243acde09dc5bb6b2a14042fcd23a49707db Signed-off-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/58103 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
* chipset_enable.c: Mark Intel Z390 as DEPmelvyn22021-11-171-1/+1
| | | | | | | | | | | | Tested read/write on GIGABYTE Z390 AORUS MASTER, incl. ME region with me_cleaner. Change-Id: If14d45c144bb32a1d1046185d4476ea29e4d0912 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Signed-off-by: melvyn2 <melvyn2@brcok.tk> Reviewed-on: https://review.coreboot.org/c/flashrom/+/58774 Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* Add Tiger Lake U Premium supportMichał Żygowski2021-11-176-8/+92
| | | | | | | | | | | | | | | | | | | | | | Tiger Lake has very low ICCRIBA (TGL=0x11, CNL=0x34 and CML=0x34) and detects as unknown chipset compatible with 300 series chipset. Add a new enum CHIPSET_500_SERIES_TIGER_POINT and treat it identically to CHIPSET_400_SERIES_COMET_POINT. There are some exceptions though, ICCRIBA is no longer present n descriptor content so a new union has been defined for new fields and used in descriptor guessing. freq_read field is not present on Tiger Lake, moreover in CannonPoint and Comet Point this field is used as eSPI/EC frequency, so a new function to print read frequency has ben added. Finally Tiger lake boot straps include eSPI, so a new bus has been added for the new straps. TEST=Flash BIOS region on Intel i5-1135G7 Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com> Change-Id: I28f3b6fe9f8ce9e976a6808683f46b6f4ec72bdd Reviewed-on: https://review.coreboot.org/c/flashrom/+/55578 Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* tests: Rename flash context in chip tests to flashctxAnastasia Klimchuk2021-11-081-22/+22
| | | | | | | | | | | | | | | Flash context used to be named `flash` which was missing the context part of it. Now it is renamed into flashctx for clarity. BUG=b:181803212 TEST=ninja test Change-Id: I3f4d9c4fe85752e16bab71ad22b0135a96cac28a Signed-off-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/58596 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
* tests: Add tests to write on chipAnastasia Klimchuk2021-11-084-0/+72
| | | | | | | | | | | | | | | | This patch adds two tests and initialises page_size in mock chip chip_W25Q128_V. page_size was not needed for previous tests (erase and read). page_size only needed to execute writing on chip with dummyflasher, so it is added here. BUG=b:181803212 TEST=ninja test Change-Id: I6f0336613ab16a7e59857006496e3590ddb14d00 Signed-off-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/58357 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
* hwaccess.c: move function declarations from programmer.h to hwaccess.hThomas Heijligen2021-11-074-33/+34
| | | | | | | | | | | | Move declarations for functions implemented in hwaccess.c from programmer.h to hwaccess.h. Change-Id: I075fd86211c766ae3d5f29c76adbd7c5b9bdbd80 Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/58865 Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* Makefile: Move libftdi1 detection to hwlibs targetThomas Heijligen2021-11-071-28/+24
| | | | | | | | | | Handle dependenies as part of the hwlibs target. Change-Id: Ib1e817d1e5248af5797fbb14c864527db6ad570c Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/58505 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* Makefile: Move NI845X_SPI library detection to hwlibs targetThomas Heijligen2021-11-071-16/+15
| | | | | | | | | | Handle dependenies as part of the hwlibs target. Change-Id: I3a5c5a584390eaf0c5ca169cc051e471f024f15d Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/58504 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* Makefile: Revise build options for Linux specific headersThomas Heijligen2021-11-075-82/+48
| | | | | | | | | | | | | Clean up the feature target by outsourcing the test to an own variable. Change the print output and don't write to the build-details file. This is in preparation for further changes. Change-Id: I18fc27252afb49fa7d1f2787faee2b5b669275aa Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/58627 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* Makefile: Revise utsname and clock_gettime testThomas Heijligen2021-11-074-47/+31
| | | | | | | | | | | | | | Clean up the feature target by outsourcing the test to an own variable. Change the print output and don't write to the build-details file. HAS_CLOCK_GETTIME=no replaces DISABLE_CLOCK_GETTIME=yes This is in preparation for further changes. Change-Id: Ie1f43b3d5a8ad79bff3f9bbc21f359ec35abc42a Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/58618 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* Makefile: compiler target: separate fixed text and value by a colonThomas Heijligen2021-11-071-8/+6
| | | | | | | | | | | Continue to use the "key: value" format like for the C compiler. Use only shell code for TARGET_OS comparison. Change-Id: I69959c20aa2e43ed67b3057c37e964a34cdab136 Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/58617 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* flashrom.c: Delete obsolete commentSimon Buhrow2021-11-071-1/+0
| | | | | | | | Change-Id: Ibd53fe34c05f87d7ecc0d6eee6463f9da3a174d4 Signed-off-by: Simon Buhrow <simon.buhrow@posteo.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/58742 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* sb600spi: Cleanup spispeed and spireamode warningsRob Barnes2021-11-041-3/+3
| | | | | | | | | | | | | | | | | | These warnings are printed at error level so they are displayed with every invocation of flashrom. This clutters the flashrom output in the usual case. Move warnings to debug level, add newline and clean up text. TEST=Deploy to guybrush, observe messages are only seen when --verbose is enabled BUG=None BRANCH=None Change-Id: Idf5e735b9e504c943bf93a428da64976d723eb2c Signed-off-by: Rob Barnes <robbarnes@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/58529 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* Makefile: Revise C compiler checkThomas Heijligen2021-11-013-15/+14
| | | | | | | | | | | | | Clean up the compiler target by outsourcing the test to an own variable. Change the print output and don't write to the build-details file. This is in preparation for further changes. Change-Id: I3d6f08ef030744c772b4ec0dc2c9e614fb90461d Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/58616 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* pony_spi: fix memory leakThomas Heijligen2021-11-011-0/+1
| | | | | | | | | | | | Free data if sp_openserport() fails and pony_spi_init() returns early with 1. Change-Id: I11858bd0bdfe8b6d03af616fe4be4fb047b8dcd9 Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/58583 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* flashrom_tester: Use elogtool to list firmware eventlogJack Rosenthal2021-10-272-7/+7
| | | | | | | | | | | | | | Mosys is dropping the eventlog command, in favor of the elogtool command provided in coreboot. The output is compatible with what mosys used to output. Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Change-Id: I8c4be82fed28b6a19746e6b93fafce23bd8ede5d Reviewed-on: https://review.coreboot.org/c/flashrom/+/58527 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Ricardo Quesada <ricardoq@google.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
* Makefile: remove NEED_LIBUSB1 from FEATURE_CFLAGSThomas Heijligen2021-10-261-1/+0
| | | | | | | | | | | | NEED_LIBUSB1 is not used outside of the Makefile. No need to pass it to the compiler. Change-Id: Ie7cb3df39daf22cb954186d38ba32812b05d92f9 Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/58518 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* Makefile: meson.build: remove unused CONFIG_I2C_SUPPORTThomas Heijligen2021-10-262-2/+0
| | | | | | | | | | | | CONFIG_I2C_SUPPORT has no mention in the source code. No need to pass it to the compiler. Change-Id: I2e19335e1b8d39f44dda14edc0a496dda6bc8c9c Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/58495 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* Makefile, ich_descriptors_tool/Makefile: unify behaviorThomas Heijligen2021-10-262-9/+8
| | | | | | | | | | | | | | ich_descriptors_tool/Makefile: have the same behavior as the main flashrom Makefile - only set gcc explicit on MinGW HOST_OS - don't fallback to gcc if CC was not set - set CFLAGS and EXEC_SUFFIX for TARGET_OS, not for HOST_OS Change-Id: I353c3de250167994a4aea1edfef57d839e900d78 Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/58468 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* Makefile: unify the use of filterThomas Heijligen2021-10-251-4/+4
| | | | | | | | | | | Make a filter statement easier to read and fix some cosmetics. Change-Id: I6cd1e169b435cadb06423836cd9d64cdd2f51a94 Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/58451 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-20 00:15:27 +0000