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* cli_classic.c: Convert do_erase() to libflashrom callEdward O'Callaghan2022-01-223-21/+14
| | | | | | | | | | | | | | | | | Inline emergency_help_message() to cli_classic call site. This leaves do_erase() a redudant wrapper and moves us a step closer to cli_classic as a pure libflashrom user by using flashrom_flash_erase(). BUG=b:208132085 TEST=`flashrom -E` Change-Id: I8566164e7dbad69cf478b24208014f10fb99e4d0 Signed-off-by: Edward O'Callaghan <quasisec@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/60068 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
* flashrom.c: extract operation only uses layout filesDaniel Campello2022-01-211-1/+2
| | | | | | | | | | | | | | | | | | | This change fixes a bug on handling the extract operation. The extract operation reads out the layout regions to filenames corresponding to the respective layout region names. read_flash_to_file() does this work via write_buf_to_include_args(). This change makes the call to write_buf_to_file() optional as it is still required for -r (read operation) but not for -x (extract operation). BUG=b:209512852 TEST=flashrom -x Fixes: commit ce983bccaab450d358854494f15c2d8a1846d56b Change-Id: Ibc9a4e2966385863345f06662521d6d0e4685121 Signed-off-by: Daniel Campello <campello@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/59921 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
* Makefile: remove obsolete distclean targetThomas Heijligen2022-01-201-3/+0
| | | | | | | | | | distclean removes .libdeps which does not exist anymore Change-Id: I7d5717b99bf44a610a77177662c208da7f58c9e7 Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/59233 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* Makefile: rename FEATURE_CFLAGS to FEATURE_FLAGSThomas Heijligen2022-01-201-59/+59
| | | | | | | | Change-Id: I819f5d76e6f37a0e0ed6481a051ed85126622503 Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/59231 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* Makefile: merge compiler, hwlibs, features targets into config targetThomas Heijligen2022-01-201-25/+12
| | | | | | | | | | These targets are all called together. No need to have them individual. Change-Id: Ic76f923bca2beb6f95b8ea0cced4569b07e9b9ba Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/60107 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* Makefile: reorder make targetsThomas Heijligen2022-01-201-35/+36
| | | | | | | | | | Use the order in which the targets get executed. Change-Id: Ic45c2fc98c679ac7be4ee2860d72b517b8b67a17 Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/60836 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* Makefile: clean up variablesThomas Heijligen2022-01-201-5/+4
| | | | | | | | | | | | | | - replace $(LIBS) by $(LDFLAGS) - use override to handle CPPFLAGS, CFLAGS, LDFLAGS This allows to append flags to the users input. - remove unused $(DIFF) Change-Id: I1c9e869377677d624469af1ee9ece9a28fc3b559 Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/59230 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
* Makefile: Make pkg-config mandatory to find libpciThomas Heijligen2022-01-203-105/+54
| | | | | | | | | | | | | | Use `make HAS_LIBPCI=yes/no` to override the pkg-config detection and `CONFIG_LIBPCI_CFLAGS` and `CONFIG_LIBPCI_LDFLAGS` to set cflags and ldflags manually. The optional dependency of libpci libz, is automatically handled by pkg-config. Change-Id: I21b4a261b34b7e688635fc6e20b7beebfa64c7ed Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/59050 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
* Makefile: replace RAW_ACCESS with RAW_MEM_ACCESS X86_MSR X86_PORT_IOThomas Heijligen2022-01-202-20/+19
| | | | | | | | | | | | Let programmer only depend on the kind of hardware access method they really need. Libpci no longer depends on all hardware access types since each programmer handles this individually. Change-Id: I5bdafaa3c5023ad6c4a695493eeddf11bc148085 Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/60325 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* hwaccess: move mmio functions into hwaccess_physmapThomas Heijligen2022-01-2028-293/+249
| | | | | | | | | | | The mmio_le/be_read/writex functions are used for raw memory access. Bundle them with the physmap functions. Change-Id: I313062b078e89630c703038866ac93c651f0f49a Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/61160 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* tests: Convert write chip tests to libflashrom APIAnastasia Klimchuk2022-01-191-2/+11
| | | | | | | | | | | | | As a part of effort to convert command line (and everything else) to be libflashrom users, chip tests need to be converted as well. TEST=ninja test Change-Id: I965598cfa74e3fb7d0780ad34491f4057617691e Signed-off-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/61139 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
* tests: Convert read chip tests to libflashrom APIAnastasia Klimchuk2022-01-191-2/+11
| | | | | | | | | | | | | As a part of effort to convert command line (and everything else) to be libflashrom users, chip tests need to be converted as well. TEST=ninja test Change-Id: I4493d4f269595783830c39a720b0a8963eab9daa Signed-off-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/61138 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
* tests: Convert erase chip tests to libflashrom APIAnastasia Klimchuk2022-01-191-2/+3
| | | | | | | | | | | | | As a part of effort to convert command line (and everything else) to be libflashrom users, chip tests need to be converted as well. TEST=ninja test Change-Id: I38529a6b4d79882f50068b3628089b178dbe0a50 Signed-off-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/61137 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
* dediprog: wait for spi bulk read xfers to finishRick Altherr2022-01-141-1/+1
| | | | | | | | | | | | | | | | | | | | | dediprog_bulk_read_poll()'s finish argument allows it to be used in two distinct cases: where dediprog_bulk_read_poll will be called as part of a loop (finish=0) and where dediprog_bulk_read_poll should wait for all outstanding transfers to finish (finish=1). In both cases, dediprog_bulk_read_poll() calls libusb to process events with a 10 second timeout. After dediprog_spi_bulk_read() has queued the last transfers, it calls dediprog_bulk_read_poll() with finish=0 when it should be finish=1. finish=0 just happens to work because frequently the transfers finish in the 10 second timeout. Signed-off-by: Rick Altherr <rick@oxidecomputer.com> Change-Id: If7cb541742c8620358c8e04275d8316131b2d1ab Reviewed-on: https://review.coreboot.org/c/flashrom/+/60087 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Nico Huber <nico.h@gmx.de>
* linux_mtd: check ioctl() return value properlyNikolai Artemiev2022-01-141-3/+5
| | | | | | | | | | | | | | | | Make the linux_mtd driver treat any negative return value from the MEMERASE ioctl as an error. Previously it only treated -1 as an error. BUG=b:213561594,b:210973586,b:182223106 BRANCH=none TEST=builds Change-Id: I40cfbdee2ab608fbe6c17d9cac6ec53ff224d9a4 Signed-off-by: Nikolai Artemiev <nartemiev@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/60996 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
* layout: Hoist get_region_range() into libflashrom APIEdward O'Callaghan2022-01-116-16/+28
| | | | | | | | | | | | | | | | | | | | While using the libflashrom API to read specific regions there is no currently no general way to find the offset into the read buffer of the expected region. flashrom_layout_include_region() probably should have returned the region offset and size if it was included. However to avoid a change in API signature we can instead hoist up get_region_range() into the API to be called after. BUG=b:207808292 TEST=`make` && tested in porting cbfstool use-case. Change-Id: I8cf95b5eaec943a51d0ea668f26a56bf6d6b4446 Signed-off-by: Edward O'Callaghan <quasisec@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/60881 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Sam McNally <sammc@google.com>
* it8212: remove unused rget_io_perms()Thomas Heijligen2022-01-101-4/+0
| | | | | | | | | | | | | The it8212 programmer does not use x86 IO Ports. Remove the dependency to it. Change-Id: Iab859fb6be6cab094c9c6ce4b3e8eac0e5ff84ab Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/60869 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Felix Singer <felixsinger@posteo.net> Reviewed-by: David Hendricks <david.hendricks@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* satasii: remove unused rget_io_perms()Thomas Heijligen2022-01-102-5/+0
| | | | | | | | | | | | The satasii programmer does not use x86 IO Ports. Remove the dependency to it. Change-Id: I54d65561ff024d3c181d11c6518a4612c2ab0399 Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/60848 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Felix Singer <felixsinger@posteo.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* ogp_spi: remove unused rget_io_perms()Thomas Heijligen2022-01-102-5/+0
| | | | | | | | | | | | The ogp_spi programmer does not use x86 IO Ports. Remove the dependency to it. Change-Id: I1f3f34e33f77159fa0cdea150e1f408ce9d943f0 Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/60847 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Felix Singer <felixsinger@posteo.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* nicintel_spi: remove unused rget_io_perms()Thomas Heijligen2022-01-102-5/+0
| | | | | | | | | | | | The nicintel_spi programmer does not use x86 IO Ports. Remove the dependency to it. Change-Id: I3e7451eceb1f01de21da934c9559dbf2f06e7e54 Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/60846 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Felix Singer <felixsinger@posteo.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* nicintel_eeprom: remove unused rget_io_perms()Thomas Heijligen2022-01-102-5/+0
| | | | | | | | | | | | The nicintel_eeprom programmer does not use x86 IO Ports. Remove the dependency to it. Change-Id: I5fd42572fd29f5d7fd749c2836eac3e68c947946 Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/60845 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Felix Singer <felixsinger@posteo.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* nicintel: remove unused rget_io_perms()Thomas Heijligen2022-01-102-8/+0
| | | | | | | | | | | | The nicintel programmer does not use x86 IO Ports. Remove the dependency to it. Change-Id: Ibe609ff8f8fdbdf2a7de8e1922325ca4ad56a9e7 Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/60844 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Felix Singer <felixsinger@posteo.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* gfxnvidia: remove unused rget_io_perms()Thomas Heijligen2022-01-102-5/+0
| | | | | | | | | | | | The gfxnvidia programmer does not use x86 IO Ports. Remove the dependency to it. Change-Id: I1f0341390ccb698bc435760f4ead7de54e429a6e Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/60843 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Felix Singer <felixsinger@posteo.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* drkaiser: remove unused rget_io_perms()Thomas Heijligen2022-01-102-5/+0
| | | | | | | | | | | | The drkaiser programmer does not use x86 IO Ports. Remove the dependency to it. Change-Id: I86bad947298a1166ff1e768f7d0b75a90e574696 Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/60842 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Felix Singer <felixsinger@posteo.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* atavia: remove unused rget_io_perms()Thomas Heijligen2022-01-102-5/+0
| | | | | | | | | | | | The atavia programmer does not use x86 IO Ports. Remove the dependency to it. Change-Id: I1fa866b3b07adf5f7a51d58f53d6cad1f88d7210 Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/60841 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Felix Singer <felixsinger@posteo.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* chipset_enable.c: Add TGP-H IDsTim Crawford2022-01-051-0/+9
| | | | | | | | | | | | | | Add IDs for: H510, B560, H570, Q570, Z590, W580, HM570, QM570, WM590 Tested on system76/oryp8 (HM570). flashrom is able to read the image using the internal programmer. Change-Id: I96f63253d42578151f99dcbb42347afecc03f49d Signed-off-by: Tim Crawford <tcrawford@system76.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/57533 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Benjamin Doron <benjamin.doron00@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* hwaccess_x86_msr: fix build for FreeBSDThomas Heijligen2022-01-051-0/+7
| | | | | | | | | | | | Add missing includes for FreeBSD Change-Id: I2045345878392436b0ea4d6bd4f2896edc645673 Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/60342 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Idwer Vollering <vidwer@gmail.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
* Makefile: list dependencies for RAW_MEM_ACCESS, X86_PORT_IO, X86_MSRThomas Heijligen2021-12-221-9/+48
| | | | | | | | | | | List all programmers which depend on the respective hwaccess features. This is the base for a precise feature selecting in the build system. Change-Id: I588f698780b5acd65084346bcef781cbfd1203ea Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/60114 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* physmap: rename to hwaccess_physmap, create own headerThomas Heijligen2021-12-2224-12/+49
| | | | | | | | | | Line up physmap with the other hwaccess related code. Change-Id: Ieba6f4e94cfc3e668fcb8b3c978de5908aed2592 Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/60113 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* hwaccess physmap: move x86 msr related code into own filesThomas Heijligen2021-12-229-359/+405
| | | | | | | | | | | | Allow x86 msr related code to be compiled independent from memory mapping functionality. This enables for a better selection of needed hardware access types. Change-Id: Idc9ce9df3ea1e291ad469de59467646b294119c4 Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/60111 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* hwaccess: move x86 port I/O related code into own filesThomas Heijligen2021-12-2231-82/+122
| | | | | | | | | | | | Allow port I/O related code to be compiled independent from memory mapping functionality. This enables for a better selection of needed hardware access types. Change-Id: I372b4a409f036da766c42bc406b596bc41b0f75a Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/60110 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* pci.h: move include into own wrapperThomas Heijligen2021-12-2224-18/+47
| | | | | | | | | | | Split the include of hwaccess and libpci. There is no need to have pci.h included in hwaccess. Change-Id: Ibf00356f0ef5cc92e0ec99f8fe5cdda56f47b166 Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/58883 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* Makefile: Make pkg-config mandatory to find libusb1Thomas Heijligen2021-12-222-56/+19
| | | | | | | | | | | | Use `make HAS_LIBUSB1=yes/no` to override the pkg-config detection and `CONFIG_LIBUSB1_CFLAGS` and `CONFIG_LIBUSB1_LDFLAGS` to set cflags and ldflags manually. Change-Id: I4f24be647d25dde24c41514f8964b7134205867c Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/59049 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* Makefile: Make pkg-config mandatory to find libjaylinkThomas Heijligen2021-12-222-48/+20
| | | | | | | | | | | | Use `make HAS_LIBJAYLINK=yes/no` to override the pkg-config detection and `CONFIG_LIBJAYLINK_CFLAGS` and `CONFIG_LIBJAYLINK_LDFLAGS` to set cflags and ldflags manually. Change-Id: I99df547046bb9820ab502f89f6d4452c1bc0cfd4 Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/59048 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* Makefile: Rework NI-845x detectionThomas Heijligen2021-12-222-65/+36
| | | | | | | | | | | | | | | Since the NI-845x is a Windows only proprietary library, disable it by default. Use `HAS_LIB_NI845X=yes` to enable it. The default search path is `${PROGRAMFILES}\National Instruments\NI-845x\MS Visual C` and can be overwritten by `CONFIG_NI845X_LIBRARY_PATH`. Use `CONFIG_LIB_NI845X_CFLAGS` and `CONFIG_LIB_NI845X_LDFLAGS` for setting the cflags and ld flags manually. Change-Id: I918c3605a5ac168708a6a10fd92ee2a1aae9729b Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/59047 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* Makefile: Make pkg-config mandatory to find libftdi1Thomas Heijligen2021-12-223-59/+57
| | | | | | | | | | | | Use `make HAS_LIBFTDI1=yes/no` to override the pkg-config detection and `CONFIG_LIBFTDI1_CFLAGS` and `CONFIG_LIBFTDI1_LDFLAGS` to set cflags and ldflags manually. Change-Id: I41f5186d9f3e063c12c8c6eea888d0b0bf534259 Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/58623 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* flashrom.8.tmpl: document W25Q128FV is emulated by dummyflasherSergii Dmytruk2021-12-171-0/+2
| | | | | | | | | | | It was absent from the list of emulated chips. Change-Id: I50f6cd6c5d853d6c70921e8027ada52d27982708 Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/59811 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
* flashrom.8.tmpl: remove outdated warning about v1.0Sergii Dmytruk2021-12-171-5/+0
| | | | | | | | | | This section is rather outdated and should be dispensed with. Change-Id: Id7e0ce412901ccb27124a9958d5ef214ab289518 Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/59408 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* flashrom.c: Validate before allocate in verify_range()Edward O'Callaghan2021-12-151-10/+8
| | | | | | | | | | | | | | | Simplify a goto away for free'ing a buffer by validating before attempting to allocate. BUG=none TEST=builds Change-Id: Iae886f203d1c59ae9a89421f7483a4ec3f747256 Signed-off-by: Edward O'Callaghan <quasisec@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/59372 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
* flashchips: Add W25Q64JVSimon Buhrow2021-12-092-0/+41
| | | | | | | | | | I have successfully tested it with FT2232H-programmer. Change-Id: Ia9a32146b225eca66e9a6bfef45be5f2b24aef46 Signed-off-by: Simon Buhrow <simon.buhrow@posteo.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/58971 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* tests: Add init-shutdown test for raiden_debug_spiAnastasia Klimchuk2021-11-296-5/+208
| | | | | | | | | | | | | | | | | This patch adds a test for raiden_debug_spi and lots of libusb wraps. libusb.h becomes required for tests to build and run, since new tests are using libusb structs in depth and opaque symbols not sufficient anymore. BUG=b:181803212 TEST=builds and ninja test Change-Id: I880a8637ab02de179df9169c1898230bce4dc1c7 Signed-off-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/57918 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
* tests: Add wraps for __xstat/__fxstat variants of stat/fstatAnastasia Klimchuk2021-11-172-0/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | __xstat and __fxstat variants of stat/fstat are invoked under chromium chroot. For all existing tests it is sufficient for stat/fstat to "do nothing, return 0", so new wraps do just that. Test which needs __xstat: linux_mtd lifecycle. Tests which need __fxstat: read_chip_test_success read_chip_with_dummyflasher_test_success write_chip_test_success write_chip_with_dummyflasher_test_success Without this patch tests above fail under chromium chroot. BUG=b:181803212 TEST=running tests on three different environments, 1) stat64/fstat64 (ninja tests in upstream tree) 2) stat64/fstat64 (ninja tests in chromium tree) 2) __xstat64/__fxstat64 (emerge with tests in chromium tree) Change-Id: I4c5c243acde09dc5bb6b2a14042fcd23a49707db Signed-off-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/58103 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
* chipset_enable.c: Mark Intel Z390 as DEPmelvyn22021-11-171-1/+1
| | | | | | | | | | | | Tested read/write on GIGABYTE Z390 AORUS MASTER, incl. ME region with me_cleaner. Change-Id: If14d45c144bb32a1d1046185d4476ea29e4d0912 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Signed-off-by: melvyn2 <melvyn2@brcok.tk> Reviewed-on: https://review.coreboot.org/c/flashrom/+/58774 Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* Add Tiger Lake U Premium supportMichał Żygowski2021-11-176-8/+92
| | | | | | | | | | | | | | | | | | | | | | Tiger Lake has very low ICCRIBA (TGL=0x11, CNL=0x34 and CML=0x34) and detects as unknown chipset compatible with 300 series chipset. Add a new enum CHIPSET_500_SERIES_TIGER_POINT and treat it identically to CHIPSET_400_SERIES_COMET_POINT. There are some exceptions though, ICCRIBA is no longer present n descriptor content so a new union has been defined for new fields and used in descriptor guessing. freq_read field is not present on Tiger Lake, moreover in CannonPoint and Comet Point this field is used as eSPI/EC frequency, so a new function to print read frequency has ben added. Finally Tiger lake boot straps include eSPI, so a new bus has been added for the new straps. TEST=Flash BIOS region on Intel i5-1135G7 Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com> Change-Id: I28f3b6fe9f8ce9e976a6808683f46b6f4ec72bdd Reviewed-on: https://review.coreboot.org/c/flashrom/+/55578 Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* tests: Rename flash context in chip tests to flashctxAnastasia Klimchuk2021-11-081-22/+22
| | | | | | | | | | | | | | | Flash context used to be named `flash` which was missing the context part of it. Now it is renamed into flashctx for clarity. BUG=b:181803212 TEST=ninja test Change-Id: I3f4d9c4fe85752e16bab71ad22b0135a96cac28a Signed-off-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/58596 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
* tests: Add tests to write on chipAnastasia Klimchuk2021-11-084-0/+72
| | | | | | | | | | | | | | | | This patch adds two tests and initialises page_size in mock chip chip_W25Q128_V. page_size was not needed for previous tests (erase and read). page_size only needed to execute writing on chip with dummyflasher, so it is added here. BUG=b:181803212 TEST=ninja test Change-Id: I6f0336613ab16a7e59857006496e3590ddb14d00 Signed-off-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/58357 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
* hwaccess.c: move function declarations from programmer.h to hwaccess.hThomas Heijligen2021-11-074-33/+34
| | | | | | | | | | | | Move declarations for functions implemented in hwaccess.c from programmer.h to hwaccess.h. Change-Id: I075fd86211c766ae3d5f29c76adbd7c5b9bdbd80 Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/58865 Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* Makefile: Move libftdi1 detection to hwlibs targetThomas Heijligen2021-11-071-28/+24
| | | | | | | | | | Handle dependenies as part of the hwlibs target. Change-Id: Ib1e817d1e5248af5797fbb14c864527db6ad570c Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/58505 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* Makefile: Move NI845X_SPI library detection to hwlibs targetThomas Heijligen2021-11-071-16/+15
| | | | | | | | | | Handle dependenies as part of the hwlibs target. Change-Id: I3a5c5a584390eaf0c5ca169cc051e471f024f15d Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/58504 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* Makefile: Revise build options for Linux specific headersThomas Heijligen2021-11-075-82/+48
| | | | | | | | | | | | | Clean up the feature target by outsourcing the test to an own variable. Change the print output and don't write to the build-details file. This is in preparation for further changes. Change-Id: I18fc27252afb49fa7d1f2787faee2b5b669275aa Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/58627 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-17 22:39:30 +0000