| Commit message (Collapse) | Author | Age | Files | Lines |
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While writing a new SPI driver I fixed some things in the SPI code:
All calls to spi_command() had unneccessary #define duplications, and in some
cases the read count define could theoretically become harmful because NULL was
passed for the read buffer. Avoid a crash, should someone change the #defines.
I also noticed that the only caller of spi_page_program() was the it87 driver,
and spi_page_program() could only call back into the it87 driver. Removed the
function for easier-to-follow code and made it8716f_spi_page_program() static.
The ichspi driver's static page functions are already static.
Corresponding to flashrom svn r302 and coreboot v2 svn r3418.
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>
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Flash.h is a database of known IDs, whereas flashchips.c is a database
of chips for which support has been implemented. Keep it that way.
Corresponding to flashrom svn r300 and coreboot v2 svn r3416.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
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This patch adds support to the AMIC A29002 chip in its top and bottom
configuration to flashrom. Additionally, the alphabetic order of the
AMIC chips was fixed.
The datasheet is at <http://www.amictechnology.com/pdf/A29002.pdf>.
A29002T PREW functionality was tested and works.
This flash chip has asymmetric sector layout so it is important to use the
mx29f002 driver, which does chip erase before writing, rather than am29f040b,
which uses sector erase.
Corresponding to flashrom svn r299 and coreboot v2 svn r3415.
Signed-off-by: Andreas Thienemann <andreas@bawue.net>
Acked-by: Peter Stuge <peter@stuge.se>
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flash bus
At some point the flash bus will be part of struct flashchip.
Pardon me for pushing this in, but I think it is important to beware of further
decay and it will improve things for other developers in the short run.
Carl-Daniel, I will consider your suggestions in another patch. I want to keep
things from getting too much for now. The patch includes Rudolf's VIA SPI
changes though.
Corresponding to flashrom svn r285 and coreboot v2 svn r3401.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
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Following patch adds support for that.
Corresponding to flashrom svn r283 and coreboot v2 svn r3399.
Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Acked-by: Peter Stuge <peter@stuge.se>
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It is similar with few documented exceptions to ICH7 SPI controller.
Corresponding to flashrom svn r282 and coreboot v2 svn r3398.
Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Acked-by: Peter Stuge <peter@stuge.se>
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* ICH7 SPI support
* fix some variable names in ichspi.c (Offset -> offset)
* Dump ICH7 SPI bar with -V
* Improve error message in case IOPL goes wrong. (It might not even be an IOPL)
Corresponding to flashrom svn r278 and coreboot v2 svn r3393.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Peter Stuge <peter@stuge.se>
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DOC support has been disabled by default for many years. The write function
does nothing but print text. It has a call to write_page_md2802() commented
out, but that function does not exist. This is dead code with ugly #ifdefs.
Updates README to reflect that there was a time when there was code, but it
didn't work. Removes M-Systems #defines and also includes svn rm msys_doc.*
Corresponding to flashrom svn r269 and coreboot v2 svn r3382.
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
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Jens sent the first patch that added A49LF040A to flash.h and flashchips.c
using _jedec and _49lf040 functions.
An issue was found with probe_w29ee011() for the Winbond W29EE011, which
caused the A49LF040A to no longer respond to any commands.
Ward made a patch to disable probing by default for the W29EE011 following
some discussion. Using -c W29EE011 will make flashrom probe for the chip.
Peter did some more datasheet diving and found that the Pm49FL00x functions
suited this chip quite well because of the block locking registers in
A49LF040A, and finally tested PROBE READ ERASE WRITE to work on ALIX.3c3.
Ward confirmed that this works on alix.2c3 too.
Corresponding to flashrom svn r260 and coreboot v2 svn r3368.
Signed-off-by: Jens Kuehnel <coreboot@jens.kuehnel.org>
Signed-off-by: Ward Vandewege <ward@gnu.org>
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Ward Vandewege <ward@gnu.org>
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When flash chip detection fails, it is still useful and possible to read the
flash chip contents. If no flash chip is found in normal probes and the
-f -r -c CHIPNAME options are given, a successful probe for the specified
chip is forced, and then flashrom reads the flash chip using either the read
function for the specified chip, or if there is none, a simple memcpy().
The patch also moves the global variable int force in flashrom.c into main()
and passes it as a parameter to layout.c:show_id(), which was the only other
function that used the variable. This is needed to avoid confusion with the
new parameter int force which is added to flashrom.c:probe_flash() and used
to force probe success for the chip named in char *chip_to_probe.
Corresponding to flashrom svn r259 and coreboot v2 svn r3367.
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Ward Vandewege <ward@gnu.org>
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PROBE READ tested by Lyos Gemini Norezel on BioStar P4M80-M4.
Corresponding to flashrom svn r257 and coreboot v2 svn r3365.
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Lyos Gemini Norezel <lyos.gemininorezel@gmail.com>
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Corresponding to flashrom svn r254 and coreboot v2 svn r3358.
Signed-off-by: Mart Raudsepp <mart.raudsepp@artecdesign.ee>
Acked-by: Mart Raudsepp <mart.raudsepp@artecdesign.ee>
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Corresponding to flashrom svn r246 and coreboot v2 svn r3345.
Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
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This patch addresses different argument order of outX() calls,
FreeBSD-specific headers, difference in certain type names and system
interface names, and also FreeBSD-specific way of gaining IO port
access.
Corresponding to flashrom svn r245 and coreboot v2 svn r3344.
Signed-off-by: Andriy Gapon <avg@icyb.net.ua>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
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The PMC chips understand both LPC and FWH flash commands. When in FWH mode
(MSR_DIVIL_BALL_OPT(0x51400015) = 0x00000f7d on 5536 boards) the Block
Locking Registers by default lock the flash chip for write and erase - in
addition to any chipset write protection.
This patch adds unlock operations before Pm49FL004/2 write and erase, and
it includes an svn mv pm49fl004.c pm49fl00x.c
Thanks go to Nikolay for this patch.
Corresponding to flashrom svn r243 and coreboot v2 svn r3332.
Signed-off-by: Nikolay Petukhov <nikolay.petukhov@gmail.com>
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Bari Ari <bari@onelabs.com>
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This is done by using the generic SPI interface.
Corresponding to flashrom svn r239 and coreboot v2 svn r3325.
Signed-off-by: Dominik Geyer <dominik.geyer@kontron.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
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Only a subset has been added to flashchips.c, but the IDs in flash.h
will make lookups easier if anybody wants to add support for them.
Corresponding to flashrom svn r236 and coreboot v2 svn r3321.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
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Add support for the JEDEC RES (Read Electronic Signature and Resume from
Powerdown) SPI command to identify older SPI chips which can't handle
JEDEC RDID.
Since RES gives a one-byte identifier which is shared among many
different vendors and even different sizes, we want to match RES as a
last resort if RDID returns 0xff 0xff 0xff.
Corresponding to flashrom svn r235 and coreboot v2 svn r3320.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Peter Stuge <peter@stuge.se>
This is a heavily reworked version of a patch by Fredrik Tolf, which was
Signed-off-by: Fredrik Tolf <fredrik@dolda2000.com>
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Corresponding to flashrom svn r234 and coreboot v2 svn r3314.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
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Flash chips which can be detected by JEDEC probe routines all have
vendor IDs with correct parity. Use a parity check as additional hint
whether a vendor ID makes sense. Note: Device IDs have no parity
requirements whatsoever.
Corresponding to flashrom svn r231 and coreboot v2 svn r3308.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Peter Stuge <peter@stuge.se>
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Add a few flashchips already mentioned in flash.h to flashchips.c
Corresponding to flashrom svn r230 and coreboot v2 svn r3306.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
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No behavioural changes, but greatly improved SPI abstraction.
Corresponding to flashrom svn r229 and coreboot v2 svn r3305.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Peter Stuge <peter@stuge.se>
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Harald Gutmann
SST39VF040 has been confirmed to probe OK by misi e.
Corresponding to flashrom svn r226 and coreboot v2 svn r3300.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
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The SST39LF series has the same IDs. Add short AMIC vendor ID to
flashrom.
Corresponding to flashrom svn r225 and coreboot v2 svn r3299.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Peter Stuge <peter@stuge.se>
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This is a very early step toward cleaning up SPI code in flashrom.
Corresponding to flashrom svn r223 and coreboot v2 svn r3295.
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
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Two bits indicate OK and BAD for each operation PROBE READ ERASE WRITE.
8 bits out of 32 are in use now. No bits set means nothing has been tested.
For chips with at least one operation that is not tested or not working, the
user is asked to email a report to a special email adress so that the table
can be updated.
All chips are TEST_UNTESTED for now.
Corresponding to flashrom svn r221 and coreboot v2 svn r3277.
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
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The generic jedec.c does not work for the ST M50FLW flash devices,
because they need an unlock command first. For this reason, ST M50FLW
support is moved to a new HW support module, because any change in
jedec.c would bear the risk to cause problems with the already supported
devices.
It's already tested with ST M50FLW080A; the other chips of this family i
dont have available, so i couldnt test it.
Corresponding to flashrom svn r219 and coreboot v2 svn r3274.
Signed-off-by: Claus Gindhart <claus.gindhart@kontron.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
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Support for flashing on the Kontron 986LCD-M board.
Corresponding to flashrom svn r213 and coreboot v2 svn r3165.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
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Corresponding to flashrom svn r209 and coreboot v2 svn r3146.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
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Corresponding to flashrom svn r204 and coreboot v2 svn r3140.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
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Cosmetic changes in some files, partly bending the 80-characters-per-line
rule in this special case, as the 80-character-limited version looks
equally crappy even in an 80x25 console/xterm, so let's make it at least
look good in a high-resolution xterm.
Corresponding to flashrom svn r203 and coreboot v2 svn r3139.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
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and mainboards
Corresponding to flashrom svn r199 and coreboot v2 svn r3133.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Ward Vandewege <ward@gnu.org>
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Some vendors like Programmable Micro Corp (PMC) need this. Both the
serial and parallel flash JEDEC detection routines would benefit from a
parity/sanity check of the vendor ID. Will do this later.
Add support for the PMC Pm25LV family of SPI flash chips.
Corresponding to flashrom svn r191 and coreboot v2 svn r3091.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Chris Lingard <chris@stockwith.co.uk>
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Corresponding to flashrom svn r187 and coreboot v2 svn r3074.
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
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Support SPI flash chips bigger than 512 kByte sitting behind IT8716F
Super I/O performing LPC-to-SPI flash translation.
Corresponding to flashrom svn r181 and coreboot v2 svn r3061.
Signed-off-by: Ronald Hoogenboom <hoogenboom30@zonnet.nl>
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
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Corresponding to flashrom svn r178 and coreboot v2 svn r3054.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
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Corresponding to flashrom svn r173 and coreboot v2 svn r3032.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
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exactly the same ID
Improve model number printing.
Add EN29F002(A)(N)B support while I'm at it.
Corresponding to flashrom svn r172 and coreboot v2 svn r3031.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Markus Boas <bios@ryven.de>
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The continuation ID code does not go further than checking for IDs of
the type 0x7fXX, but does this for vendor and product ID. The current
published JEDEC spec has a list where the largest vendor ID is 7 bytes
long, but all leading bytes are 0x7f. The list will grow in the future,
and using a 64bit variable will not be enough anymore.
Besides that, it seems that the location of the ID byte after the first
continuation ID byte is very vendor specific, so we may have to revisit
that code some time in the future.
(Suggestion for a new encoding:
Use a two-byte data type for the ID, the lower byte contains the only
non-0x7f byte, the upper byte contains the number of 0x7f bytes used as
prefix, which is the bank number minus 1 the vendor ID appears in.)
Add support for EON EN29F002AT.
Corresponding to flashrom svn r171 and coreboot v2 svn r3030.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Corey Osgood <corey.osgood@gmail.com>
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This fixes a few vendor IDs to conform with JEDEC publication 106W
(JEP106W), adds some device IDs and provides information about
non-conforming IDs. The EON change is left to the patch adding EON
chips.
This patch should have no effect on code generation.
Corresponding to flashrom svn r170 and coreboot v2 svn r3029.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Corey Osgood <corey.osgood@gmail.com>
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Add support for ST M25P05-A, M25P10-A, M25P20, M25P40, M25P16, M25P32,
M25P64, M25P128.
ST M25P80 support is already there. Not tested, but conforming to data
sheets and double checked.
Corresponding to flashrom svn r166 and coreboot v2 svn r3012.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
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To make it easier to add new SPI chips to flashchips.c, rename functions
with multiple possible opcodes from linear numbering at the end (_1, _2)
to include the opcode at the end (_60, _c7).
That way, you only have to take a short look at the data sheet and
choose the right function by appending the opcode listed in the data
sheet. No functional changes.
Corresponding to flashrom svn r165 and coreboot v2 svn r3009.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Ward Vandewege <ward@gnu.org>
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Detection was tested. Print status register before erase to help
debugging block locks.
Corresponding to flashrom svn r164 and coreboot v2 svn r3008.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Corey Osgood <corey.osgood@gmail.com>
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AT49F002
AT49F002N
AT49F002T
AT49F002NT
Only tested the read function on AT49F002T.
datasheet @ http://www.atmel.com/atmel/acrobat/doc1017.pdf
Corresponding to flashrom svn r163 and coreboot v2 svn r3003.
Signed-off-by: Frederico Silva <frederico.silva@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
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Also, s/0xFF80/0xFFC0/ in the Acorp 6A815EPD board-enable, as per
http://www.linuxbios.org/pipermail/linuxbios/2007-December/027750.html
Corresponding to flashrom svn r162 and coreboot v2 svn r2997.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
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Detection and reading works, writing is not tested.
Corresponding to flashrom svn r158 and coreboot v2 svn r2903.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Peter Stuge <peter@stuge.se>
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Looking through the sources of Uniflash utility I found that this chip
is no more no less than low-voltage variant of Am29F040B but with
different ID.
So I created a very quick patch (attached).
Corresponding to flashrom svn r157 and coreboot v2 svn r2897.
Signed-off-by: Peter Lemenkov <lemenkov@gmail.com>
Acked-by: Peter Stuge <peter@stuge.se>
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Corresponding to flashrom svn r156 and coreboot v2 svn r2884.
Signed-off-by: Peter Lemenkov <lemenkov@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
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Corresponding to flashrom svn r155 and coreboot v2 svn r2881.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
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The first chip the code was tested and verified with is the Macronix
MX25L4005, but other chips should work as well. Timeouts are still
hardcoded to data sheet maxima, but the status register checking code is
already there. Thanks to Harald Gutmann for the initial code on which
this is loosely based.
Corresponding to flashrom svn r152 and coreboot v2 svn r2874.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
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