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* Add support for Amic A25L40P SPI flashRudolf Marek2008-05-221-0/+1
| | | | | | | Corresponding to flashrom svn r246 and coreboot v2 svn r3345. Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Changes to make flashrom compile (and work) on FreeBSDAndriy Gapon2008-05-221-0/+19
| | | | | | | | | | | | This patch addresses different argument order of outX() calls, FreeBSD-specific headers, difference in certain type names and system interface names, and also FreeBSD-specific way of gaining IO port access. Corresponding to flashrom svn r245 and coreboot v2 svn r3344. Signed-off-by: Andriy Gapon <avg@icyb.net.ua> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Support Pm49FL004/2 Block Locking RegistersNikolay Petukhov2008-05-171-4/+4
| | | | | | | | | | | | | | | | | | The PMC chips understand both LPC and FWH flash commands. When in FWH mode (MSR_DIVIL_BALL_OPT(0x51400015) = 0x00000f7d on 5536 boards) the Block Locking Registers by default lock the flash chip for write and erase - in addition to any chipset write protection. This patch adds unlock operations before Pm49FL004/2 write and erase, and it includes an svn mv pm49fl004.c pm49fl00x.c Thanks go to Nikolay for this patch. Corresponding to flashrom svn r243 and coreboot v2 svn r3332. Signed-off-by: Nikolay Petukhov <nikolay.petukhov@gmail.com> Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Bari Ari <bari@onelabs.com>
* Add support for SPI chips on ICH9Dominik Geyer2008-05-161-1/+7
| | | | | | | | | This is done by using the generic SPI interface. Corresponding to flashrom svn r239 and coreboot v2 svn r3325. Signed-off-by: Dominik Geyer <dominik.geyer@kontron.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Lots of new SST flash chip IDsCarl-Daniel Hailfinger2008-05-151-1/+14
| | | | | | | | | | Only a subset has been added to flashchips.c, but the IDs in flash.h will make lookups easier if anybody wants to add support for them. Corresponding to flashrom svn r236 and coreboot v2 svn r3321. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Add support for the JEDEC RESCarl-Daniel Hailfinger2008-05-151-1/+5
| | | | | | | | | | | | | | | | | | Add support for the JEDEC RES (Read Electronic Signature and Resume from Powerdown) SPI command to identify older SPI chips which can't handle JEDEC RDID. Since RES gives a one-byte identifier which is shared among many different vendors and even different sizes, we want to match RES as a last resort if RDID returns 0xff 0xff 0xff. Corresponding to flashrom svn r235 and coreboot v2 svn r3320. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Peter Stuge <peter@stuge.se> This is a heavily reworked version of a patch by Fredrik Tolf, which was Signed-off-by: Fredrik Tolf <fredrik@dolda2000.com>
* Add more infrastructure for flashrom ICH9 supportCarl-Daniel Hailfinger2008-05-141-0/+2
| | | | | | | Corresponding to flashrom svn r234 and coreboot v2 svn r3314. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Reinauer <stepan@coresystems.de>
* Check the JEDEC vendor ID for correct parityCarl-Daniel Hailfinger2008-05-141-0/+1
| | | | | | | | | | | | Flash chips which can be detected by JEDEC probe routines all have vendor IDs with correct parity. Use a parity check as additional hint whether a vendor ID makes sense. Note: Device IDs have no parity requirements whatsoever. Corresponding to flashrom svn r231 and coreboot v2 svn r3308. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Peter Stuge <peter@stuge.se>
* Add lots of ATMEL SPI flash chips to flash.hCarl-Daniel Hailfinger2008-05-141-1/+13
| | | | | | | | | Add a few flashchips already mentioned in flash.h to flashchips.c Corresponding to flashrom svn r230 and coreboot v2 svn r3306. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Move all IT87xx specific SPI routines from spi.c to a separate file it87spi.cCarl-Daniel Hailfinger2008-05-131-0/+12
| | | | | | | | | No behavioural changes, but greatly improved SPI abstraction. Corresponding to flashrom svn r229 and coreboot v2 svn r3305. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Peter Stuge <peter@stuge.se>
* MX25L3205 and W25x40 have been confirmed to probe/read/erase/write OK by ↵Carl-Daniel Hailfinger2008-05-121-0/+1
| | | | | | | | | | | Harald Gutmann SST39VF040 has been confirmed to probe OK by misi e. Corresponding to flashrom svn r226 and coreboot v2 svn r3300. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Add SST39VF512, SST39VF010, SST39VF040 supportCarl-Daniel Hailfinger2008-05-121-0/+4
| | | | | | | | | | The SST39LF series has the same IDs. Add short AMIC vendor ID to flashrom. Corresponding to flashrom svn r225 and coreboot v2 svn r3299. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Peter Stuge <peter@stuge.se>
* Rename generic_spi_*() functions to spi_*()Peter Stuge2008-05-101-6/+6
| | | | | | | | | This is a very early step toward cleaning up SPI code in flashrom. Corresponding to flashrom svn r223 and coreboot v2 svn r3295. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Add a tested bitmap field to the flash chip tablePeter Stuge2008-05-031-0/+19
| | | | | | | | | | | | | | | Two bits indicate OK and BAD for each operation PROBE READ ERASE WRITE. 8 bits out of 32 are in use now. No bits set means nothing has been tested. For chips with at least one operation that is not tested or not working, the user is asked to email a report to a special email adress so that the table can be updated. All chips are TEST_UNTESTED for now. Corresponding to flashrom svn r221 and coreboot v2 svn r3277. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Separate ST M50FLW support from generic JEDEC codeClaus Gindhart2008-04-281-0/+4
| | | | | | | | | | | | | | | | The generic jedec.c does not work for the ST M50FLW flash devices, because they need an unlock command first. For this reason, ST M50FLW support is moved to a new HW support module, because any change in jedec.c would bear the risk to cause problems with the already supported devices. It's already tested with ST M50FLW080A; the other chips of this family i dont have available, so i couldnt test it. Corresponding to flashrom svn r219 and coreboot v2 svn r3274. Signed-off-by: Claus Gindhart <claus.gindhart@kontron.com> Acked-by: Stefan Reinauer <stepan@coresystems.de>
* Support for the Winbond W39V080FA series of chipsStefan Reinauer2008-03-171-0/+7
| | | | | | | | | Support for flashing on the Kontron 986LCD-M board. Corresponding to flashrom svn r213 and coreboot v2 svn r3165. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Re-add code erroneously removed in r3140Uwe Hermann2008-03-141-0/+1
| | | | | | | Corresponding to flashrom svn r209 and coreboot v2 svn r3146. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Revert the delete of 82802ab.c in r3137Carl-Daniel Hailfinger2008-03-141-1/+0
| | | | | | | Corresponding to flashrom svn r204 and coreboot v2 svn r3140. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Also print the chip vendor name in --list-supported outputUwe Hermann2008-03-131-0/+1
| | | | | | | | | | | | Cosmetic changes in some files, partly bending the 80-characters-per-line rule in this special case, as the 80-character-limited version looks equally crappy even in an 80x25 console/xterm, so let's make it at least look good in a high-resolution xterm. Corresponding to flashrom svn r203 and coreboot v2 svn r3139. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Add --list-supported option which lists the supported ROM chips, chipsets, ↵Uwe Hermann2008-03-121-0/+5
| | | | | | | | | and mainboards Corresponding to flashrom svn r199 and coreboot v2 svn r3133. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Ward Vandewege <ward@gnu.org>
* Handle JEDEC JEP106W continuation codes in SPI RDIDCarl-Daniel Hailfinger2008-02-061-1/+14
| | | | | | | | | | | | | Some vendors like Programmable Micro Corp (PMC) need this. Both the serial and parallel flash JEDEC detection routines would benefit from a parity/sanity check of the vendor ID. Will do this later. Add support for the PMC Pm25LV family of SPI flash chips. Corresponding to flashrom svn r191 and coreboot v2 svn r3091. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Chris Lingard <chris@stockwith.co.uk>
* Add ids and chip entry for Spansion S25FL016A, tested, workingPeter Stuge2008-01-251-0/+8
| | | | | | | Corresponding to flashrom svn r187 and coreboot v2 svn r3074. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Further abstract SPI functions to allow chips bigger than 512 kB behind IT8716FsRonald Hoogenboom2008-01-191-0/+10
| | | | | | | | | | | Support SPI flash chips bigger than 512 kByte sitting behind IT8716F Super I/O performing LPC-to-SPI flash translation. Corresponding to flashrom svn r181 and coreboot v2 svn r3061. Signed-off-by: Ronald Hoogenboom <hoogenboom30@zonnet.nl> Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Rename LinuxBIOS to corebootStefan Reinauer2008-01-181-2/+2
| | | | | | | Corresponding to flashrom svn r178 and coreboot v2 svn r3054. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de>
* Print at least the vendor for SPI flash chips if the exact chip ID is unknownCarl-Daniel Hailfinger2008-01-041-1/+4
| | | | | | | Corresponding to flashrom svn r173 and coreboot v2 svn r3032. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Ronald G. Minnich <rminnich@gmail.com>
* Unfortunately, EN29F002T, EN29F002AT, EN29F002ANT, EN29F002NT all have ↵Carl-Daniel Hailfinger2007-12-311-2/+2
| | | | | | | | | | | | | exactly the same ID Improve model number printing. Add EN29F002(A)(N)B support while I'm at it. Corresponding to flashrom svn r172 and coreboot v2 svn r3031. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Markus Boas <bios@ryven.de>
* Add continuation ID support to jedec.cCarl-Daniel Hailfinger2007-12-311-3/+20
| | | | | | | | | | | | | | | | | | | | | | | The continuation ID code does not go further than checking for IDs of the type 0x7fXX, but does this for vendor and product ID. The current published JEDEC spec has a list where the largest vendor ID is 7 bytes long, but all leading bytes are 0x7f. The list will grow in the future, and using a 64bit variable will not be enough anymore. Besides that, it seems that the location of the ID byte after the first continuation ID byte is very vendor specific, so we may have to revisit that code some time in the future. (Suggestion for a new encoding: Use a two-byte data type for the ID, the lower byte contains the only non-0x7f byte, the upper byte contains the number of 0x7f bytes used as prefix, which is the bank number minus 1 the vendor ID appears in.) Add support for EON EN29F002AT. Corresponding to flashrom svn r171 and coreboot v2 svn r3030. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Corey Osgood <corey.osgood@gmail.com>
* Refine various vendor ID annotationsCarl-Daniel Hailfinger2007-12-311-10/+20
| | | | | | | | | | | | | | This fixes a few vendor IDs to conform with JEDEC publication 106W (JEP106W), adds some device IDs and provides information about non-conforming IDs. The EON change is left to the patch adding EON chips. This patch should have no effect on code generation. Corresponding to flashrom svn r170 and coreboot v2 svn r3029. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Corey Osgood <corey.osgood@gmail.com>
* Add support for various ST M25P* chipsCarl-Daniel Hailfinger2007-12-171-0/+8
| | | | | | | | | | | | | Add support for ST M25P05-A, M25P10-A, M25P20, M25P40, M25P16, M25P32, M25P64, M25P128. ST M25P80 support is already there. Not tested, but conforming to data sheets and double checked. Corresponding to flashrom svn r166 and coreboot v2 svn r3012. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Rename SPI erase functions to include opcodeCarl-Daniel Hailfinger2007-12-171-1/+1
| | | | | | | | | | | | | | | To make it easier to add new SPI chips to flashchips.c, rename functions with multiple possible opcodes from linear numbering at the end (_1, _2) to include the opcode at the end (_60, _c7). That way, you only have to take a short look at the data sheet and choose the right function by appending the opcode listed in the data sheet. No functional changes. Corresponding to flashrom svn r165 and coreboot v2 svn r3009. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Ward Vandewege <ward@gnu.org>
* Add support for ST M25P80 chipsCarl-Daniel Hailfinger2007-12-161-0/+5
| | | | | | | | | | Detection was tested. Print status register before erase to help debugging block locks. Corresponding to flashrom svn r164 and coreboot v2 svn r3008. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Corey Osgood <corey.osgood@gmail.com>
* Add support for more atmel chipsFrederico Silva2007-12-101-0/+2
| | | | | | | | | | | | | | | AT49F002 AT49F002N AT49F002T AT49F002NT Only tested the read function on AT49F002T. datasheet @ http://www.atmel.com/atmel/acrobat/doc1017.pdf Corresponding to flashrom svn r163 and coreboot v2 svn r3003. Signed-off-by: Frederico Silva <frederico.silva@gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Various coding style fixes, constification, fixed typosUwe Hermann2007-12-041-19/+26
| | | | | | | | | | Also, s/0xFF80/0xFFC0/ in the Acorp 6A815EPD board-enable, as per http://www.linuxbios.org/pipermail/linuxbios/2007-December/027750.html Corresponding to flashrom svn r162 and coreboot v2 svn r2997. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Add support for Intel 440MX and Fujitsu MBM29F400TCUwe Hermann2007-10-301-0/+1
| | | | | | | | | Detection and reading works, writing is not tested. Corresponding to flashrom svn r158 and coreboot v2 svn r2903. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Peter Stuge <peter@stuge.se>
* Add Am29LV040BPeter Lemenkov2007-10-251-0/+1
| | | | | | | | | | | | | Looking through the sources of Uniflash utility I found that this chip is no more no less than low-voltage variant of Am29F040B but with different ID. So I created a very quick patch (attached). Corresponding to flashrom svn r157 and coreboot v2 svn r2897. Signed-off-by: Peter Lemenkov <lemenkov@gmail.com> Acked-by: Peter Stuge <peter@stuge.se>
* Add more Vendor IDs and ensure correct sorting in flash.hPeter Lemenkov2007-10-221-27/+45
| | | | | | | Corresponding to flashrom svn r156 and coreboot v2 svn r2884. Signed-off-by: Peter Lemenkov <lemenkov@gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Introduce block and sector erase routines, but do not use them yetCarl-Daniel Hailfinger2007-10-221-5/+15
| | | | | | | Corresponding to flashrom svn r155 and coreboot v2 svn r2881. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Reinauer <stepan@coresystems.de>
* Add generic SPI flash erase and write supportCarl-Daniel Hailfinger2007-10-181-0/+5
| | | | | | | | | | | | | The first chip the code was tested and verified with is the Macronix MX25L4005, but other chips should work as well. Timeouts are still hardcoded to data sheet maxima, but the status register checking code is already there. Thanks to Harald Gutmann for the initial code on which this is loosely based. Corresponding to flashrom svn r152 and coreboot v2 svn r2874. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Reinauer <stepan@coresystems.de>
* Convert the existing it8716f_* functions to generic_spi_* functionsCarl-Daniel Hailfinger2007-10-161-1/+1
| | | | | | | Corresponding to flashrom svn r147 and coreboot v2 svn r2863. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Reinauer <stepan@coresystems.de>
* Move SPI code out of board_enable.c where it started its lifeCarl-Daniel Hailfinger2007-10-151-0/+2
| | | | | | | | | | | | | | | The SPI chip finding and SPI chip accessor code is moved as well. This can be split later if we feel like it. The non-use of svn cp is intentional because the only history we'd have to preserve are a few commits which were early prototypes of chip identification code. For those who intend to look at that history, they can look at board_enable.c revision 2853. Corresponding to flashrom svn r145 and coreboot v2 svn r2857. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Reinauer <stepan@coresystems.de>
* This patch aims to restructure SPI flash support in a more reasonable wayCarl-Daniel Hailfinger2007-10-021-0/+27
| | | | | | | | | | | | | | | | | | It introduces a generic SPI host driver for the IT8716F Super I/O which will enable easy SPI programming without having to care for the peculiarities of the SPI host. To activate probing for the IT8716F, you have to use the gigabyte:m57sli mainboard override. SPI support will then use the gathered SPI host data to access the SPI flash. This has been tested sucessfully by Ward Vandewege <ward@gnu.org> on the GA-M57SLI v2.0, which has a MX25L4005 SPI flash part. Corresponding to flashrom svn r140 and coreboot v2 svn r2817. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Ward Vandewege <ward@gnu.org>
* Remove useless 'extern' keywordsUwe Hermann2007-09-091-54/+54
| | | | | | | Corresponding to flashrom svn r137 and coreboot v2 svn r2769. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Add '(C)' where it's missing (for consistency reasons)Uwe Hermann2007-09-091-3/+3
| | | | | | | Corresponding to flashrom svn r136 and coreboot v2 svn r2768. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Add support for the Winbond W29EE011Markus Boas2007-08-301-0/+4
| | | | | | | Corresponding to flashrom svn r133 and coreboot v2 svn r2753. Signed-off-by: Markus Boas <ryven@ryven.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Add support for the Winbond W29C040PMarkus Boas2007-08-301-0/+1
| | | | | | | Corresponding to flashrom svn r132 and coreboot v2 svn r2752. Signed-off-by: Markus Boas <ryven@ryven.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Change all flashrom license headers to use our standard formatUwe Hermann2007-08-291-13/+12
| | | | | | | | | No changes in content of the files. Corresponding to flashrom svn r131 and coreboot v2 svn r2751. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Drop a bunch of useless header files, merge them into flash.hUwe Hermann2007-08-231-2/+99
| | | | | | | Corresponding to flashrom svn r128 and coreboot v2 svn r2746. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Stefan Reinauer <stepan@coresystems.de>
* Add various ST flash chipsCarl-Daniel Hailfinger2007-07-251-0/+8
| | | | | | | | | | | | | | This patch adds support for the M50FLW040A, M50FLW040B, M50FLW080A, M50FLW080B, M50FW080, M50FW016, M50LPW116, M29W010B flash chips made by ST. The patch is based on the data sheets of the chips and has not been tested at all. Corresponding to flashrom svn r123 and coreboot v2 svn r2741. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* This patch adds support for ST M50FW040 and ST M29W040BCarl-Daniel Hailfinger2007-07-241-0/+2
| | | | | | | | | | | Only reading from the chips was tested; writing support is untested. Thanks to Gürkan Sengün <gurkan@linuks.mine.nu> for testing! Corresponding to flashrom svn r122 and coreboot v2 svn r2740. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Factor out register mapping codeStefan Reinauer2007-05-241-0/+2
| | | | | | | Corresponding to flashrom svn r113 and coreboot v2 svn r2691. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de>
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