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| author | Xiretza <xiretza@xiretza.xyz> | 2020-05-14 16:08:18 +0200 |
|---|---|---|
| committer | tgingold <tgingold@users.noreply.github.com> | 2020-05-14 18:54:32 +0200 |
| commit | 9984dc1a03316c21b4710b84a32b9fdb8aae1e05 (patch) | |
| tree | ce2e16055135922487b66b40254ac5f5f7af2c91 | |
| parent | 2f7e216f11a3b6f0422e10dfdeb673dd4c9ecd36 (diff) | |
| download | ghdl-yosys-plugin-9984dc1a03316c21b4710b84a32b9fdb8aae1e05.tar.gz ghdl-yosys-plugin-9984dc1a03316c21b4710b84a32b9fdb8aae1e05.tar.bz2 ghdl-yosys-plugin-9984dc1a03316c21b4710b84a32b9fdb8aae1e05.zip | |
Fix ordering of $pmux ports
For Id_Pmux, IN(2+n) corresponds to s(n).
For $pmux, B[n*WIDTH-1:(n-1)*WIDTH] corresponds to S[n].
Therefore, the inputs need to be appended in ascending order, such that
IN(2) is assigned to B[WIDTH-1:0], IN(3) to B[2*WIDTH-1:WIDTH], etc.
| -rw-r--r-- | src/ghdl.cc | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/ghdl.cc b/src/ghdl.cc index 3541bc4..ef2ddaf 100644 --- a/src/ghdl.cc +++ b/src/ghdl.cc @@ -887,8 +887,8 @@ static void import_module(RTLIL::Design *design, GhdlSynth::Module m) { RTLIL::SigSpec b; RTLIL::SigSpec s = IN(0); - for (unsigned i = s.size(); i > 0; i--) - b.append(IN(2 + i - 1)); + for (int i = 0; i < s.size(); i++) + b.append(IN(2 + i)); module->addPmux(to_str(iname), IN(1), b, s, OUT(0)); } break; |