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| author | eine <6628437+eine@users.noreply.github.com> | 2020-01-19 03:25:43 +0000 |
|---|---|---|
| committer | tgingold <tgingold@users.noreply.github.com> | 2020-01-19 04:25:43 +0100 |
| commit | 910073d647e55d133494429d8c3a4bacffc32428 (patch) | |
| tree | 6b1e616a1f670d44b03c1239ab5cba8aff15b909 /examples/icestick/uart/syn/constraints | |
| parent | 175123cda990ee2b5cfac461bd8ec44956da302a (diff) | |
| download | ghdl-yosys-plugin-910073d647e55d133494429d8c3a4bacffc32428.tar.gz ghdl-yosys-plugin-910073d647e55d133494429d8c3a4bacffc32428.tar.bz2 ghdl-yosys-plugin-910073d647e55d133494429d8c3a4bacffc32428.zip | |
migrate from Travis to GHA and rework examples (#78)
* migrate from Travis to GHA
* rework examples
Diffstat (limited to 'examples/icestick/uart/syn/constraints')
| -rwxr-xr-x | examples/icestick/uart/syn/constraints/uart.pcf | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/examples/icestick/uart/syn/constraints/uart.pcf b/examples/icestick/uart/syn/constraints/uart.pcf new file mode 100755 index 0000000..e3e5016 --- /dev/null +++ b/examples/icestick/uart/syn/constraints/uart.pcf @@ -0,0 +1,6 @@ +# FTDI Port B UART +set_io osl_data_n 8 # UART TX +set_io isl_data_n 9 # UART RX + +# 12 MHz clock +set_io isl_clk 21 |