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| author | eine <6628437+eine@users.noreply.github.com> | 2020-01-19 03:25:43 +0000 |
|---|---|---|
| committer | tgingold <tgingold@users.noreply.github.com> | 2020-01-19 04:25:43 +0100 |
| commit | 910073d647e55d133494429d8c3a4bacffc32428 (patch) | |
| tree | 6b1e616a1f670d44b03c1239ab5cba8aff15b909 /icestick/blink.vhdl | |
| parent | 175123cda990ee2b5cfac461bd8ec44956da302a (diff) | |
| download | ghdl-yosys-plugin-910073d647e55d133494429d8c3a4bacffc32428.tar.gz ghdl-yosys-plugin-910073d647e55d133494429d8c3a4bacffc32428.tar.bz2 ghdl-yosys-plugin-910073d647e55d133494429d8c3a4bacffc32428.zip | |
migrate from Travis to GHA and rework examples (#78)
* migrate from Travis to GHA
* rework examples
Diffstat (limited to 'icestick/blink.vhdl')
| -rw-r--r-- | icestick/blink.vhdl | 23 |
1 files changed, 0 insertions, 23 deletions
diff --git a/icestick/blink.vhdl b/icestick/blink.vhdl deleted file mode 100644 index d7e6dd4..0000000 --- a/icestick/blink.vhdl +++ /dev/null @@ -1,23 +0,0 @@ -architecture blink of leds is - signal clk_4hz: std_logic; -begin - process (clk) - -- 3_000_000 is 0x2dc6c0 - variable counter : unsigned (23 downto 0); - begin - if rising_edge(clk) then - if counter = 2_999_999 then - counter := x"000000"; - clk_4hz <= not clk_4hz; - else - counter := counter + 1; - end if; - end if; - end process; - - led1 <= clk_4hz; - led2 <= clk_4hz; - led3 <= clk_4hz; - led4 <= clk_4hz; - led5 <= clk_4hz; -end blink; |