Add a test for #102

1 files changed, 25 insertions, 0 deletions

diff --git a/testsuite/issues/issue102/counters_8.vhdl b/testsuite/issues/issue102/counters_8.vhdl
new file mode 100644
index 0000000..57ff057
--- /dev/null
+++ b/testsuite/issues/issue102/counters_8.vhdl
@@ -0,0 +1,25 @@
+library ieee;
+use ieee.std_logic_1164.all;
+use ieee.std_logic_arith.all;
+
+entity counters_8 is
+    generic (MAX : integer := 12);
+    port(C, CLR : in std_logic;
+         Q : out integer range 0 to MAX-1);
+end counters_8;
+
+architecture archi of counters_8 is
+    signal cnt : integer range 0 to MAX-1;
+begin
+    process (C, CLR)
+    begin
+        if (CLR='1') then
+            cnt <= 0;
+        elsif (rising_edge(C)) then
+            cnt <= (cnt + 1) mod MAX ;
+        end if;
+    end process;
+
+    Q <= cnt;
+
+end archi;