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author | Tristan Gingold <tgingold@free.fr> | 2019-12-31 18:58:04 +0100 |
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committer | Tristan Gingold <tgingold@free.fr> | 2019-12-31 18:58:04 +0100 |
commit | 4c1aef606f2e1149d66e13138bf019b46682ce76 (patch) | |
tree | 717d3d311f77a81d78521dafea304388e22ba5f8 /testsuite/issues | |
parent | 8b220d2f18e12ef72879c44e0e105672a3e860df (diff) | |
download | ghdl-yosys-plugin-4c1aef606f2e1149d66e13138bf019b46682ce76.tar.gz ghdl-yosys-plugin-4c1aef606f2e1149d66e13138bf019b46682ce76.tar.bz2 ghdl-yosys-plugin-4c1aef606f2e1149d66e13138bf019b46682ce76.zip |
testsuite: add reproducer for #76
Diffstat (limited to 'testsuite/issues')
-rw-r--r-- | testsuite/issues/issue76/dff01.vhdl | 29 | ||||
-rwxr-xr-x | testsuite/issues/issue76/testsuite.sh | 9 |
2 files changed, 38 insertions, 0 deletions
diff --git a/testsuite/issues/issue76/dff01.vhdl b/testsuite/issues/issue76/dff01.vhdl new file mode 100644 index 0000000..b076f41 --- /dev/null +++ b/testsuite/issues/issue76/dff01.vhdl @@ -0,0 +1,29 @@ +library ieee; +use ieee.std_logic_1164.all; + +entity dff01 is + port (q : out std_logic_vector (3 downto 0); + d : std_logic_vector (3 downto 0); + en : std_logic; + rst : std_logic; + clk : std_logic); +end dff01; + +architecture behav of dff01 is + signal t : std_logic_vector (7 downto 0); + signal a : std_logic_vector (3 downto 0); +begin + a <= d xor b"0101"; + + process (clk) is + begin + if rst = '1' then + q <= x"0"; + elsif rising_edge (clk) then + if en = '1' then + q <= d; + t (7 downto 4) <= a; + end if; + end if; + end process; +end behav; diff --git a/testsuite/issues/issue76/testsuite.sh b/testsuite/issues/issue76/testsuite.sh new file mode 100755 index 0000000..7a6cdb3 --- /dev/null +++ b/testsuite/issues/issue76/testsuite.sh @@ -0,0 +1,9 @@ +#!/bin/sh + +topdir=../.. +. $topdir/testenv.sh + +run_yosys -q -p "ghdl dff01.vhdl -e; hierarchy -check -top dff01" + +clean +echo OK |