1 files changed, 18 insertions, 0 deletions
diff --git a/testsuite/examples/blackbox/blackbox1.vhdl b/testsuite/examples/blackbox/blackbox1.vhdl
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index 0000000..fed6d0b
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+++ b/testsuite/examples/blackbox/blackbox1.vhdl
@@ -0,0 +1,18 @@
+library ieee;
+use ieee.std_logic_1164.all;
+
+entity blackbox1 is
+  port (a, b : std_logic;
+        o : out std_logic);
+end blackbox1;
+
+architecture behav of blackbox1 is
+  component my_blackbox is
+    port (a, b : std_logic;
+          o : out std_logic);
+  end component;
+begin
+  inst: my_blackbox
+    port map (a => a, b => b, o => o);
+end behav;
+