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| author | Patrick Lehmann <Patrick.Lehmann@plc2.de> | 2021-06-26 18:47:45 +0200 |
|---|---|---|
| committer | Patrick Lehmann <Patrick.Lehmann@plc2.de> | 2021-07-01 06:39:46 +0200 |
| commit | 06e53f991bee84c881cbea64bb9f7067d9d033fc (patch) | |
| tree | 7ccf710a07be4325aa9ec8351310149696178a01 | |
| parent | 2492b5595c7a61e29096a217e46f9dfe2e0fd6ac (diff) | |
| download | ghdl-06e53f991bee84c881cbea64bb9f7067d9d033fc.tar.gz ghdl-06e53f991bee84c881cbea64bb9f7067d9d033fc.tar.bz2 ghdl-06e53f991bee84c881cbea64bb9f7067d9d033fc.zip | |
Fix Codacy problems.
| -rw-r--r-- | pyGHDL/dom/Expression.py | 2 | ||||
| -rw-r--r-- | pyGHDL/libghdl/__init__.py | 10 | ||||
| -rw-r--r-- | pyGHDL/libghdl/errorout_memory.py | 3 | ||||
| -rw-r--r-- | pyGHDL/libghdl/files_map.py | 16 | ||||
| -rw-r--r-- | pyGHDL/libghdl/files_map_editor.py | 1 | ||||
| -rw-r--r-- | pyGHDL/libghdl/libraries.py | 4 | ||||
| -rw-r--r-- | pyGHDL/libghdl/name_table.py | 4 | ||||
| -rw-r--r-- | pyGHDL/libghdl/vhdl/flists.py | 3 | ||||
| -rw-r--r-- | pyGHDL/libghdl/vhdl/lists.py | 2 | ||||
| -rw-r--r-- | pyGHDL/libghdl/vhdl/nodes.py | 372 | ||||
| -rw-r--r-- | pyGHDL/libghdl/vhdl/nodes_meta.py | 3 | ||||
| -rw-r--r-- | pyGHDL/libghdl/vhdl/nodes_utils.py | 5 | ||||
| -rw-r--r-- | pyGHDL/libghdl/vhdl/parse.py | 1 | ||||
| -rw-r--r-- | pyGHDL/libghdl/vhdl/scanner.py | 5 | ||||
| -rw-r--r-- | pyGHDL/libghdl/vhdl/sem_lib.py | 1 | ||||
| -rwxr-xr-x | scripts/pnodespy.py | 6 |
16 files changed, 432 insertions, 6 deletions
diff --git a/pyGHDL/dom/Expression.py b/pyGHDL/dom/Expression.py index b3256d551..e34feb31c 100644 --- a/pyGHDL/dom/Expression.py +++ b/pyGHDL/dom/Expression.py @@ -530,7 +530,7 @@ class QualifiedExpression(VHDLModel_QualifiedExpression, DOMMixin): from pyGHDL.dom._Translate import GetExpressionFromNode, GetNameOfNode typeMarkName = GetNameOfNode(nodes.Get_Type_Mark(node)) - subType = SimpleSubTypeSymbol(typeMarkName) + subType = SimpleSubTypeSymbol(node, typeMarkName) operand = GetExpressionFromNode(nodes.Get_Expression(node)) return cls(subType, operand) diff --git a/pyGHDL/libghdl/__init__.py b/pyGHDL/libghdl/__init__.py index 39722f3b9..8c9d132e9 100644 --- a/pyGHDL/libghdl/__init__.py +++ b/pyGHDL/libghdl/__init__.py @@ -36,7 +36,7 @@ from sys import platform as sys_platform, version_info as sys_version_info from os import environ as os_environ from pathlib import Path from shutil import which -from typing import List +from typing import List, Optional from pydecor import export @@ -46,16 +46,18 @@ from pyGHDL.libghdl._types import Iir # from pyGHDL.libghdl._decorator import BindToLibGHDL from pyGHDL.libghdl.version import __version__ +Nullable = Optional + class LibGHDLException(GHDLBaseException): - _internalErrors: List[str] + _internalErrors: Nullable[List[str]] - def __init__(self, message: str, errors: List[str]): + def __init__(self, message: str, errors: List[str] = None): super().__init__(message) self._internalErrors = errors @property - def InternalErrors(self): + def InternalErrors(self) -> Nullable[List[str]]: return self._internalErrors diff --git a/pyGHDL/libghdl/errorout_memory.py b/pyGHDL/libghdl/errorout_memory.py index c6577540d..3f85a03c9 100644 --- a/pyGHDL/libghdl/errorout_memory.py +++ b/pyGHDL/libghdl/errorout_memory.py @@ -94,6 +94,7 @@ def Get_Nbr_Messages() -> ErrorIndex: :return: Number of messages available. """ + return 0 @export @@ -110,7 +111,7 @@ def Get_Error_Record(Idx: ErrorIndex) -> Error_Message: # @export @BindToLibGHDL("errorout__memory__get_error_message_addr") def _Get_Error_Message(Idx: ErrorIndex) -> c_char_p: - pass + return "" @export diff --git a/pyGHDL/libghdl/files_map.py b/pyGHDL/libghdl/files_map.py index 1726225bc..d57de13cc 100644 --- a/pyGHDL/libghdl/files_map.py +++ b/pyGHDL/libghdl/files_map.py @@ -59,6 +59,7 @@ def Location_To_File(Location: LocationType) -> SourceFileEntry: :param Location: Location :return: Source file. Return ``No_Source_File_Entry`` if location is incorrect. """ + return 0 @export @@ -71,6 +72,7 @@ def Location_File_To_Pos(Location: LocationType, File: SourceFileEntry) -> int: :param File: Source file :return: Offset """ + return 0 @export @@ -83,6 +85,7 @@ def Location_File_To_Line(Location: LocationType, File: SourceFileEntry) -> int: :param File: Source file :return: Line number """ + return 0 @export @@ -98,6 +101,7 @@ def Location_File_Line_To_Offset( :param Line: Line number :return: Offset """ + return 0 @export @@ -114,6 +118,7 @@ def Location_File_Line_To_Col( :param Line: Line number :return: logical column (horizontal tabs are expanded) """ + return 0 @export @@ -124,6 +129,7 @@ def File_To_Location(File: SourceFileEntry) -> LocationType: :param File: Source file :return: Location. """ + return 0 @export @@ -136,6 +142,7 @@ def File_Pos_To_Location(File: SourceFileEntry, Pos: int) -> LocationType: :param Pos: Offset in the file :return: Location. """ + return 0 @export @@ -148,6 +155,7 @@ def File_Line_To_Position(File: SourceFileEntry, Line: int) -> int: :param Line: Line number :return: Return ``Source_Ptr_Bad`` in case of error (:obj:`Line` out of bounds). """ + return 0 @export @@ -159,6 +167,7 @@ def Get_File_Name(File: SourceFileEntry) -> NameId: :param File: Source file to get the filename from. :return: NameId for the filename. """ + return 0 @export @@ -170,6 +179,7 @@ def Get_Directory_Name(File: SourceFileEntry) -> NameId: :param File: Source file to get the directory name from. :return: NameId for the directory. """ + return 0 @export @@ -181,6 +191,7 @@ def Get_File_Buffer(File: SourceFileEntry) -> bytes: :param File: Source file to get the buffer from. :return: Type: ``File_Buffer_Ptr`` """ + return 0 @export @@ -192,6 +203,7 @@ def Get_File_Length(File: SourceFileEntry) -> int: :param File: Source file :return: Type: ``Source_Ptr`` """ + return 0 @export @@ -205,6 +217,7 @@ def Set_File_Length(File: SourceFileEntry, Length: int) -> None: :param File: Source file :param Length: Length for the file. Type: ``Source_Ptr`` """ + return 0 # @export @@ -219,6 +232,7 @@ def Read_Source_File(Directory: NameId, Name: NameId) -> SourceFileEntry: :param Name: File name :return: Return ``No_Source_File_Entry``, if the file does not exist. """ + return 0 @export @@ -236,6 +250,7 @@ def Reserve_Source_File( :param Length: Length to reserve. Type: ``Source_Ptr`` :return: SourceFile """ + return 0 @export @@ -272,3 +287,4 @@ def Get_Last_Source_File_Entry() -> SourceFileEntry: :return: Last SourceFileEntry. Type: ``SourceFileEntry`` """ + return 0 diff --git a/pyGHDL/libghdl/files_map_editor.py b/pyGHDL/libghdl/files_map_editor.py index 2009af882..996db5931 100644 --- a/pyGHDL/libghdl/files_map_editor.py +++ b/pyGHDL/libghdl/files_map_editor.py @@ -63,6 +63,7 @@ def _Replace_Text( :param Text_Length: Type: ``Source_Ptr`` :return: Return True in case of success, False in case of failure (the gap is too small). """ + return False @export diff --git a/pyGHDL/libghdl/libraries.py b/pyGHDL/libghdl/libraries.py index 7dd417054..07075044d 100644 --- a/pyGHDL/libghdl/libraries.py +++ b/pyGHDL/libghdl/libraries.py @@ -72,6 +72,7 @@ def Get_Libraries_Chain() -> Iir_Library_Declaration: :return: undocumented """ + return 0 @export @@ -116,6 +117,7 @@ def Find_Entity_For_Component(Name: NameId) -> Iir_Design_Unit: :param Name: Entity name to search for. :return: undocumented """ + return 0 @export @@ -127,6 +129,7 @@ def Get_Library_No_Create(Ident: NameId) -> Iir_Library_Declaration: :param Ident: Library to look for. :return: Return :attr:`~pyGHDL.libghdl.vhdl.nodes.Null_Iir` if it doesn't exist. """ + return 0 @export @@ -141,3 +144,4 @@ def Find_Primary_Unit( :param Name: Primary unit to search for. :return: undocumented """ + return 0 diff --git a/pyGHDL/libghdl/name_table.py b/pyGHDL/libghdl/name_table.py index 408168797..8718982af 100644 --- a/pyGHDL/libghdl/name_table.py +++ b/pyGHDL/libghdl/name_table.py @@ -53,12 +53,14 @@ def Get_Name_Length(Id: NameId) -> int: :param Id: NameId for the identifier to query. :return: Length of the identifier. """ + return 0 # @export @BindToLibGHDL("name_table__get_name_ptr") def _Get_Name_Ptr(Id: NameId) -> c_char_p: """""" + return "" @export @@ -78,6 +80,7 @@ def Get_Name_Ptr(Id: NameId) -> str: @BindToLibGHDL("name_table__get_character") def _Get_Character(Id: NameId) -> c_char: """""" + return 0 @export @@ -99,6 +102,7 @@ def Get_Character(Id: NameId) -> str: @BindToLibGHDL("name_table__get_identifier_with_len") def _Get_Identifier(string: c_char_p, length: int) -> NameId: """""" + return 0 @export diff --git a/pyGHDL/libghdl/vhdl/flists.py b/pyGHDL/libghdl/vhdl/flists.py index 3829921f3..9d5b7fdb7 100644 --- a/pyGHDL/libghdl/vhdl/flists.py +++ b/pyGHDL/libghdl/vhdl/flists.py @@ -56,6 +56,7 @@ def Flast(FList: int) -> int: :param FList: List to query. :return: Index of the last element in the list. """ + return 0 @export @@ -67,6 +68,7 @@ def Length(FList: int) -> int: :param FList: List to query. :return: Number of elements in the list. """ + return 0 @export @@ -80,3 +82,4 @@ def Get_Nth_Element(FList: int, N: int) -> int: :param FList: List to query. :return: Type: ``El_Type`` """ + return 0 diff --git a/pyGHDL/libghdl/vhdl/lists.py b/pyGHDL/libghdl/vhdl/lists.py index d9e4fda6c..6f8370a09 100644 --- a/pyGHDL/libghdl/vhdl/lists.py +++ b/pyGHDL/libghdl/vhdl/lists.py @@ -125,6 +125,7 @@ def Get_Nbr_Elements(List: int) -> int: :param List: The list to use. :return: Number of list elements. """ + return 0 @export @@ -135,6 +136,7 @@ def Create_Iir_List() -> int: :return: undocumented; Type: ``List_Type`` """ + return 0 @export diff --git a/pyGHDL/libghdl/vhdl/nodes.py b/pyGHDL/libghdl/vhdl/nodes.py index 923f49606..9bffe757c 100644 --- a/pyGHDL/libghdl/vhdl/nodes.py +++ b/pyGHDL/libghdl/vhdl/nodes.py @@ -1803,18 +1803,21 @@ class Iir_Predefined(IntEnum): @BindToLibGHDL("vhdl__nodes__get_kind") def Get_Kind(node: Iir) -> IirKind: """Get node kind.""" + return 0 @export @BindToLibGHDL("vhdl__nodes__get_location") def Get_Location(node: Iir) -> LocationType: """""" + return 0 @export @BindToLibGHDL("vhdl__nodes__get_first_design_unit") def Get_First_Design_Unit(obj: Iir) -> Iir: """""" + return 0 @export @@ -1827,6 +1830,7 @@ def Set_First_Design_Unit(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_last_design_unit") def Get_Last_Design_Unit(obj: Iir) -> Iir: """""" + return 0 @export @@ -1839,6 +1843,7 @@ def Set_Last_Design_Unit(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_library_declaration") def Get_Library_Declaration(obj: Iir) -> Iir: """""" + return 0 @export @@ -1851,6 +1856,7 @@ def Set_Library_Declaration(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_file_checksum") def Get_File_Checksum(obj: Iir) -> FileChecksumId: """""" + return 0 @export @@ -1863,6 +1869,7 @@ def Set_File_Checksum(obj: Iir, value: FileChecksumId) -> None: @BindToLibGHDL("vhdl__nodes__get_analysis_time_stamp") def Get_Analysis_Time_Stamp(obj: Iir) -> TimeStampId: """""" + return 0 @export @@ -1875,6 +1882,7 @@ def Set_Analysis_Time_Stamp(obj: Iir, value: TimeStampId) -> None: @BindToLibGHDL("vhdl__nodes__get_design_file_source") def Get_Design_File_Source(obj: Iir) -> SourceFileEntry: """""" + return 0 @export @@ -1887,6 +1895,7 @@ def Set_Design_File_Source(obj: Iir, value: SourceFileEntry) -> None: @BindToLibGHDL("vhdl__nodes__get_library") def Get_Library(obj: Iir) -> Iir: """""" + return 0 @export @@ -1899,6 +1908,7 @@ def Set_Library(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_file_dependence_list") def Get_File_Dependence_List(obj: Iir) -> Iir: """""" + return 0 @export @@ -1911,6 +1921,7 @@ def Set_File_Dependence_List(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_design_file_filename") def Get_Design_File_Filename(obj: Iir) -> NameId: """""" + return 0 @export @@ -1923,6 +1934,7 @@ def Set_Design_File_Filename(obj: Iir, value: NameId) -> None: @BindToLibGHDL("vhdl__nodes__get_design_file_directory") def Get_Design_File_Directory(obj: Iir) -> NameId: """""" + return 0 @export @@ -1935,6 +1947,7 @@ def Set_Design_File_Directory(obj: Iir, value: NameId) -> None: @BindToLibGHDL("vhdl__nodes__get_design_file") def Get_Design_File(obj: Iir) -> Iir: """""" + return 0 @export @@ -1947,6 +1960,7 @@ def Set_Design_File(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_design_file_chain") def Get_Design_File_Chain(obj: Iir) -> Iir: """""" + return 0 @export @@ -1959,6 +1973,7 @@ def Set_Design_File_Chain(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_library_directory") def Get_Library_Directory(obj: Iir) -> NameId: """""" + return 0 @export @@ -1971,6 +1986,7 @@ def Set_Library_Directory(obj: Iir, value: NameId) -> None: @BindToLibGHDL("vhdl__nodes__get_date") def Get_Date(obj: Iir) -> DateType: """""" + return 0 @export @@ -1983,6 +1999,7 @@ def Set_Date(obj: Iir, value: DateType) -> None: @BindToLibGHDL("vhdl__nodes__get_context_items") def Get_Context_Items(obj: Iir) -> Iir: """""" + return 0 @export @@ -1995,6 +2012,7 @@ def Set_Context_Items(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_dependence_list") def Get_Dependence_List(obj: Iir) -> Iir: """""" + return 0 @export @@ -2007,6 +2025,7 @@ def Set_Dependence_List(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_analysis_checks_list") def Get_Analysis_Checks_List(obj: Iir) -> Iir: """""" + return 0 @export @@ -2019,6 +2038,7 @@ def Set_Analysis_Checks_List(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_date_state") def Get_Date_State(obj: Iir) -> DateStateType: """""" + return 0 @export @@ -2031,6 +2051,7 @@ def Set_Date_State(obj: Iir, value: DateStateType) -> None: @BindToLibGHDL("vhdl__nodes__get_guarded_target_state") def Get_Guarded_Target_State(obj: Iir) -> TriStateType: """""" + return 0 @export @@ -2043,6 +2064,7 @@ def Set_Guarded_Target_State(obj: Iir, value: TriStateType) -> None: @BindToLibGHDL("vhdl__nodes__get_library_unit") def Get_Library_Unit(obj: Iir) -> Iir: """""" + return 0 @export @@ -2055,6 +2077,7 @@ def Set_Library_Unit(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_hash_chain") def Get_Hash_Chain(obj: Iir) -> Iir: """""" + return 0 @export @@ -2067,6 +2090,7 @@ def Set_Hash_Chain(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_design_unit_source_pos") def Get_Design_Unit_Source_Pos(obj: Iir) -> SourcePtr: """""" + return 0 @export @@ -2079,6 +2103,7 @@ def Set_Design_Unit_Source_Pos(obj: Iir, value: SourcePtr) -> None: @BindToLibGHDL("vhdl__nodes__get_design_unit_source_line") def Get_Design_Unit_Source_Line(obj: Iir) -> Int32: """""" + return 0 @export @@ -2091,6 +2116,7 @@ def Set_Design_Unit_Source_Line(obj: Iir, value: Int32) -> None: @BindToLibGHDL("vhdl__nodes__get_design_unit_source_col") def Get_Design_Unit_Source_Col(obj: Iir) -> Int32: """""" + return 0 @export @@ -2103,6 +2129,7 @@ def Set_Design_Unit_Source_Col(obj: Iir, value: Int32) -> None: @BindToLibGHDL("vhdl__nodes__get_value") def Get_Value(obj: Iir) -> Int64: """""" + return 0 @export @@ -2115,6 +2142,7 @@ def Set_Value(obj: Iir, value: Int64) -> None: @BindToLibGHDL("vhdl__nodes__get_enum_pos") def Get_Enum_Pos(obj: Iir) -> Iir: """""" + return 0 @export @@ -2127,6 +2155,7 @@ def Set_Enum_Pos(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_physical_literal") def Get_Physical_Literal(obj: Iir) -> Iir: """""" + return 0 @export @@ -2139,6 +2168,7 @@ def Set_Physical_Literal(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_fp_value") def Get_Fp_Value(obj: Iir) -> Fp64: """""" + return 0 @export @@ -2151,6 +2181,7 @@ def Set_Fp_Value(obj: Iir, value: Fp64) -> None: @BindToLibGHDL("vhdl__nodes__get_simple_aggregate_list") def Get_Simple_Aggregate_List(obj: Iir) -> Iir: """""" + return 0 @export @@ -2163,6 +2194,7 @@ def Set_Simple_Aggregate_List(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_string8_id") def Get_String8_Id(obj: Iir) -> String8Id: """""" + return 0 @export @@ -2175,6 +2207,7 @@ def Set_String8_Id(obj: Iir, value: String8Id) -> None: @BindToLibGHDL("vhdl__nodes__get_string_length") def Get_String_Length(obj: Iir) -> Int32: """""" + return 0 @export @@ -2187,6 +2220,7 @@ def Set_String_Length(obj: Iir, value: Int32) -> None: @BindToLibGHDL("vhdl__nodes__get_bit_string_base") def Get_Bit_String_Base(obj: Iir) -> NumberBaseType: """""" + return 0 @export @@ -2199,6 +2233,7 @@ def Set_Bit_String_Base(obj: Iir, value: NumberBaseType) -> None: @BindToLibGHDL("vhdl__nodes__get_has_signed") def Get_Has_Signed(obj: Iir) -> Boolean: """""" + return 0 @export @@ -2211,6 +2246,7 @@ def Set_Has_Signed(obj: Iir, value: Boolean) -> None: @BindToLibGHDL("vhdl__nodes__get_has_sign") def Get_Has_Sign(obj: Iir) -> Boolean: """""" + return 0 @export @@ -2223,6 +2259,7 @@ def Set_Has_Sign(obj: Iir, value: Boolean) -> None: @BindToLibGHDL("vhdl__nodes__get_has_length") def Get_Has_Length(obj: Iir) -> Boolean: """""" + return 0 @export @@ -2235,6 +2272,7 @@ def Set_Has_Length(obj: Iir, value: Boolean) -> None: @BindToLibGHDL("vhdl__nodes__get_literal_length") def Get_Literal_Length(obj: Iir) -> Int32: """""" + return 0 @export @@ -2247,6 +2285,7 @@ def Set_Literal_Length(obj: Iir, value: Int32) -> None: @BindToLibGHDL("vhdl__nodes__get_literal_origin") def Get_Literal_Origin(obj: Iir) -> Iir: """""" + return 0 @export @@ -2259,6 +2298,7 @@ def Set_Literal_Origin(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_range_origin") def Get_Range_Origin(obj: Iir) -> Iir: """""" + return 0 @export @@ -2271,6 +2311,7 @@ def Set_Range_Origin(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_literal_subtype") def Get_Literal_Subtype(obj: Iir) -> Iir: """""" + return 0 @export @@ -2283,6 +2324,7 @@ def Set_Literal_Subtype(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_allocator_subtype") def Get_Allocator_Subtype(obj: Iir) -> Iir: """""" + return 0 @export @@ -2295,6 +2337,7 @@ def Set_Allocator_Subtype(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_entity_class") def Get_Entity_Class(obj: Iir) -> Tok: """""" + return 0 @export @@ -2307,6 +2350,7 @@ def Set_Entity_Class(obj: Iir, value: Tok) -> None: @BindToLibGHDL("vhdl__nodes__get_entity_name_list") def Get_Entity_Name_List(obj: Iir) -> Iir: """""" + return 0 @export @@ -2319,6 +2363,7 @@ def Set_Entity_Name_List(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_attribute_designator") def Get_Attribute_Designator(obj: Iir) -> Iir: """""" + return 0 @export @@ -2331,6 +2376,7 @@ def Set_Attribute_Designator(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_attribute_specification_chain") def Get_Attribute_Specification_Chain(obj: Iir) -> Iir: """""" + return 0 @export @@ -2343,6 +2389,7 @@ def Set_Attribute_Specification_Chain(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_attribute_specification") def Get_Attribute_Specification(obj: Iir) -> Iir: """""" + return 0 @export @@ -2355,6 +2402,7 @@ def Set_Attribute_Specification(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_static_attribute_flag") def Get_Static_Attribute_Flag(obj: Iir) -> Boolean: """""" + return 0 @export @@ -2367,6 +2415,7 @@ def Set_Static_Attribute_Flag(obj: Iir, value: Boolean) -> None: @BindToLibGHDL("vhdl__nodes__get_signal_list") def Get_Signal_List(obj: Iir) -> Iir: """""" + return 0 @export @@ -2379,6 +2428,7 @@ def Set_Signal_List(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_quantity_list") def Get_Quantity_List(obj: Iir) -> Iir: """""" + return 0 @export @@ -2391,6 +2441,7 @@ def Set_Quantity_List(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_designated_entity") def Get_Designated_Entity(obj: Iir) -> Iir: """""" + return 0 @export @@ -2403,6 +2454,7 @@ def Set_Designated_Entity(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_formal") def Get_Formal(obj: Iir) -> Iir: """""" + return 0 @export @@ -2415,6 +2467,7 @@ def Set_Formal(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_actual") def Get_Actual(obj: Iir) -> Iir: """""" + return 0 @export @@ -2427,6 +2480,7 @@ def Set_Actual(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_actual_conversion") def Get_Actual_Conversion(obj: Iir) -> Iir: """""" + return 0 @export @@ -2439,6 +2493,7 @@ def Set_Actual_Conversion(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_formal_conversion") def Get_Formal_Conversion(obj: Iir) -> Iir: """""" + return 0 @export @@ -2451,6 +2506,7 @@ def Set_Formal_Conversion(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_whole_association_flag") def Get_Whole_Association_Flag(obj: Iir) -> Boolean: """""" + return 0 @export @@ -2463,6 +2519,7 @@ def Set_Whole_Association_Flag(obj: Iir, value: Boolean) -> None: @BindToLibGHDL("vhdl__nodes__get_collapse_signal_flag") def Get_Collapse_Signal_Flag(obj: Iir) -> Boolean: """""" + return 0 @export @@ -2475,6 +2532,7 @@ def Set_Collapse_Signal_Flag(obj: Iir, value: Boolean) -> None: @BindToLibGHDL("vhdl__nodes__get_artificial_flag") def Get_Artificial_Flag(obj: Iir) -> Boolean: """""" + return 0 @export @@ -2487,6 +2545,7 @@ def Set_Artificial_Flag(obj: Iir, value: Boolean) -> None: @BindToLibGHDL("vhdl__nodes__get_open_flag") def Get_Open_Flag(obj: Iir) -> Boolean: """""" + return 0 @export @@ -2499,6 +2558,7 @@ def Set_Open_Flag(obj: Iir, value: Boolean) -> None: @BindToLibGHDL("vhdl__nodes__get_after_drivers_flag") def Get_After_Drivers_Flag(obj: Iir) -> Boolean: """""" + return 0 @export @@ -2511,6 +2571,7 @@ def Set_After_Drivers_Flag(obj: Iir, value: Boolean) -> None: @BindToLibGHDL("vhdl__nodes__get_we_value") def Get_We_Value(obj: Iir) -> Iir: """""" + return 0 @export @@ -2523,6 +2584,7 @@ def Set_We_Value(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_time") def Get_Time(obj: Iir) -> Iir: """""" + return 0 @export @@ -2535,6 +2597,7 @@ def Set_Time(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_associated_expr") def Get_Associated_Expr(obj: Iir) -> Iir: """""" + return 0 @export @@ -2547,6 +2610,7 @@ def Set_Associated_Expr(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_associated_block") def Get_Associated_Block(obj: Iir) -> Iir: """""" + return 0 @export @@ -2559,6 +2623,7 @@ def Set_Associated_Block(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_associated_chain") def Get_Associated_Chain(obj: Iir) -> Iir: """""" + return 0 @export @@ -2571,6 +2636,7 @@ def Set_Associated_Chain(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_choice_name") def Get_Choice_Name(obj: Iir) -> Iir: """""" + return 0 @export @@ -2583,6 +2649,7 @@ def Set_Choice_Name(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_choice_expression") def Get_Choice_Expression(obj: Iir) -> Iir: """""" + return 0 @export @@ -2595,6 +2662,7 @@ def Set_Choice_Expression(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_choice_range") def Get_Choice_Range(obj: Iir) -> Iir: """""" + return 0 @export @@ -2607,6 +2675,7 @@ def Set_Choice_Range(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_same_alternative_flag") def Get_Same_Alternative_Flag(obj: Iir) -> Boolean: """""" + return 0 @export @@ -2619,6 +2688,7 @@ def Set_Same_Alternative_Flag(obj: Iir, value: Boolean) -> None: @BindToLibGHDL("vhdl__nodes__get_element_type_flag") def Get_Element_Type_Flag(obj: Iir) -> Boolean: """""" + return 0 @export @@ -2631,6 +2701,7 @@ def Set_Element_Type_Flag(obj: Iir, value: Boolean) -> None: @BindToLibGHDL("vhdl__nodes__get_architecture") def Get_Architecture(obj: Iir) -> Iir: """""" + return 0 @export @@ -2643,6 +2714,7 @@ def Set_Architecture(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_block_specification") def Get_Block_Specification(obj: Iir) -> Iir: """""" + return 0 @export @@ -2655,6 +2727,7 @@ def Set_Block_Specification(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_prev_block_configuration") def Get_Prev_Block_Configuration(obj: Iir) -> Iir: """""" + return 0 @export @@ -2667,6 +2740,7 @@ def Set_Prev_Block_Configuration(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_configuration_item_chain") def Get_Configuration_Item_Chain(obj: Iir) -> Iir: """""" + return 0 @export @@ -2679,6 +2753,7 @@ def Set_Configuration_Item_Chain(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_attribute_value_chain") def Get_Attribute_Value_Chain(obj: Iir) -> Iir: """""" + return 0 @export @@ -2691,6 +2766,7 @@ def Set_Attribute_Value_Chain(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_spec_chain") def Get_Spec_Chain(obj: Iir) -> Iir: """""" + return 0 @export @@ -2703,6 +2779,7 @@ def Set_Spec_Chain(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_value_chain") def Get_Value_Chain(obj: Iir) -> Iir: """""" + return 0 @export @@ -2715,6 +2792,7 @@ def Set_Value_Chain(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_attribute_value_spec_chain") def Get_Attribute_Value_Spec_Chain(obj: Iir) -> Iir: """""" + return 0 @export @@ -2727,6 +2805,7 @@ def Set_Attribute_Value_Spec_Chain(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_entity_name") def Get_Entity_Name(obj: Iir) -> Iir: """""" + return 0 @export @@ -2739,6 +2818,7 @@ def Set_Entity_Name(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_package") def Get_Package(obj: Iir) -> Iir: """""" + return 0 @export @@ -2751,6 +2831,7 @@ def Set_Package(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_package_body") def Get_Package_Body(obj: Iir) -> Iir: """""" + return 0 @export @@ -2763,6 +2844,7 @@ def Set_Package_Body(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_instance_package_body") def Get_Instance_Package_Body(obj: Iir) -> Iir: """""" + return 0 @export @@ -2775,6 +2857,7 @@ def Set_Instance_Package_Body(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_need_body") def Get_Need_Body(obj: Iir) -> Boolean: """""" + return 0 @export @@ -2787,6 +2870,7 @@ def Set_Need_Body(obj: Iir, value: Boolean) -> None: @BindToLibGHDL("vhdl__nodes__get_macro_expanded_flag") def Get_Macro_Expanded_Flag(obj: Iir) -> Boolean: """""" + return 0 @export @@ -2799,6 +2883,7 @@ def Set_Macro_Expanded_Flag(obj: Iir, value: Boolean) -> None: @BindToLibGHDL("vhdl__nodes__get_need_instance_bodies") def Get_Need_Instance_Bodies(obj: Iir) -> Boolean: """""" + return 0 @export @@ -2811,6 +2896,7 @@ def Set_Need_Instance_Bodies(obj: Iir, value: Boolean) -> None: @BindToLibGHDL("vhdl__nodes__get_hierarchical_name") def Get_Hierarchical_Name(obj: Iir) -> Iir: """""" + return 0 @export @@ -2823,6 +2909,7 @@ def Set_Hierarchical_Name(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_inherit_spec_chain") def Get_Inherit_Spec_Chain(obj: Iir) -> Iir: """""" + return 0 @export @@ -2835,6 +2922,7 @@ def Set_Inherit_Spec_Chain(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_vunit_item_chain") def Get_Vunit_Item_Chain(obj: Iir) -> Iir: """""" + return 0 @export @@ -2847,6 +2935,7 @@ def Set_Vunit_Item_Chain(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_bound_vunit_chain") def Get_Bound_Vunit_Chain(obj: Iir) -> Iir: """""" + return 0 @export @@ -2859,6 +2948,7 @@ def Set_Bound_Vunit_Chain(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_verification_block_configuration") def Get_Verification_Block_Configuration(obj: Iir) -> Iir: """""" + return 0 @export @@ -2871,6 +2961,7 @@ def Set_Verification_Block_Configuration(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_block_configuration") def Get_Block_Configuration(obj: Iir) -> Iir: """""" + return 0 @export @@ -2883,6 +2974,7 @@ def Set_Block_Configuration(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_concurrent_statement_chain") def Get_Concurrent_Statement_Chain(obj: Iir) -> Iir: """""" + return 0 @export @@ -2895,6 +2987,7 @@ def Set_Concurrent_Statement_Chain(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_chain") def Get_Chain(obj: Iir) -> Iir: """""" + return 0 @export @@ -2907,6 +3000,7 @@ def Set_Chain(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_port_chain") def Get_Port_Chain(obj: Iir) -> Iir: """""" + return 0 @export @@ -2919,6 +3013,7 @@ def Set_Port_Chain(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_generic_chain") def Get_Generic_Chain(obj: Iir) -> Iir: """""" + return 0 @export @@ -2931,6 +3026,7 @@ def Set_Generic_Chain(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_type") def Get_Type(obj: Iir) -> Iir: """""" + return 0 @export @@ -2943,6 +3039,7 @@ def Set_Type(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_subtype_indication") def Get_Subtype_Indication(obj: Iir) -> Iir: """""" + return 0 @export @@ -2955,6 +3052,7 @@ def Set_Subtype_Indication(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_discrete_range") def Get_Discrete_Range(obj: Iir) -> Iir: """""" + return 0 @export @@ -2967,6 +3065,7 @@ def Set_Discrete_Range(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_type_definition") def Get_Type_Definition(obj: Iir) -> Iir: """""" + return 0 @export @@ -2979,6 +3078,7 @@ def Set_Type_Definition(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_subtype_definition") def Get_Subtype_Definition(obj: Iir) -> Iir: """""" + return 0 @export @@ -2991,6 +3091,7 @@ def Set_Subtype_Definition(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_incomplete_type_declaration") def Get_Incomplete_Type_Declaration(obj: Iir) -> Iir: """""" + return 0 @export @@ -3003,6 +3104,7 @@ def Set_Incomplete_Type_Declaration(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_interface_type_subprograms") def Get_Interface_Type_Subprograms(obj: Iir) -> Iir: """""" + return 0 @export @@ -3015,6 +3117,7 @@ def Set_Interface_Type_Subprograms(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_nature_definition") def Get_Nature_Definition(obj: Iir) -> Iir: """""" + return 0 @export @@ -3027,6 +3130,7 @@ def Set_Nature_Definition(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_nature") def Get_Nature(obj: Iir) -> Iir: """""" + return 0 @export @@ -3039,6 +3143,7 @@ def Set_Nature(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_subnature_indication") def Get_Subnature_Indication(obj: Iir) -> Iir: """""" + return 0 @export @@ -3051,6 +3156,7 @@ def Set_Subnature_Indication(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_mode") def Get_Mode(obj: Iir) -> Iir: """""" + return 0 @export @@ -3063,6 +3169,7 @@ def Set_Mode(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_guarded_signal_flag") def Get_Guarded_Signal_Flag(obj: Iir) -> Boolean: """""" + return 0 @export @@ -3075,6 +3182,7 @@ def Set_Guarded_Signal_Flag(obj: Iir, value: Boolean) -> None: @BindToLibGHDL("vhdl__nodes__get_signal_kind") def Get_Signal_Kind(obj: Iir) -> Iir: """""" + return 0 @export @@ -3087,6 +3195,7 @@ def Set_Signal_Kind(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_base_name") def Get_Base_Name(obj: Iir) -> Iir: """""" + return 0 @export @@ -3099,6 +3208,7 @@ def Set_Base_Name(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_interface_declaration_chain") def Get_Interface_Declaration_Chain(obj: Iir) -> Iir: """""" + return 0 @export @@ -3111,6 +3221,7 @@ def Set_Interface_Declaration_Chain(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_subprogram_specification") def Get_Subprogram_Specification(obj: Iir) -> Iir: """""" + return 0 @export @@ -3123,6 +3234,7 @@ def Set_Subprogram_Specification(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_sequential_statement_chain") def Get_Sequential_Statement_Chain(obj: Iir) -> Iir: """""" + return 0 @export @@ -3135,6 +3247,7 @@ def Set_Sequential_Statement_Chain(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_simultaneous_statement_chain") def Get_Simultaneous_Statement_Chain(obj: Iir) -> Iir: """""" + return 0 @export @@ -3147,6 +3260,7 @@ def Set_Simultaneous_Statement_Chain(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_subprogram_body") def Get_Subprogram_Body(obj: Iir) -> Iir: """""" + return 0 @export @@ -3159,6 +3273,7 @@ def Set_Subprogram_Body(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_overload_number") def Get_Overload_Number(obj: Iir) -> Iir: """""" + return 0 @export @@ -3171,6 +3286,7 @@ def Set_Overload_Number(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_subprogram_depth") def Get_Subprogram_Depth(obj: Iir) -> Iir: """""" + return 0 @export @@ -3183,6 +3299,7 @@ def Set_Subprogram_Depth(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_subprogram_hash") def Get_Subprogram_Hash(obj: Iir) -> Iir: """""" + return 0 @export @@ -3195,6 +3312,7 @@ def Set_Subprogram_Hash(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_impure_depth") def Get_Impure_Depth(obj: Iir) -> Iir: """""" + return 0 @export @@ -3207,6 +3325,7 @@ def Set_Impure_Depth(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_return_type") def Get_Return_Type(obj: Iir) -> Iir: """""" + return 0 @export @@ -3219,6 +3338,7 @@ def Set_Return_Type(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_implicit_definition") def Get_Implicit_Definition(obj: Iir) -> Iir: """""" + return 0 @export @@ -3231,6 +3351,7 @@ def Set_Implicit_Definition(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_uninstantiated_subprogram_name") def Get_Uninstantiated_Subprogram_Name(obj: Iir) -> Iir: """""" + return 0 @export @@ -3243,6 +3364,7 @@ def Set_Uninstantiated_Subprogram_Name(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_default_value") def Get_Default_Value(obj: Iir) -> Iir: """""" + return 0 @export @@ -3255,6 +3377,7 @@ def Set_Default_Value(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_deferred_declaration") def Get_Deferred_Declaration(obj: Iir) -> Iir: """""" + return 0 @export @@ -3267,6 +3390,7 @@ def Set_Deferred_Declaration(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_deferred_declaration_flag") def Get_Deferred_Declaration_Flag(obj: Iir) -> Boolean: """""" + return 0 @export @@ -3279,6 +3403,7 @@ def Set_Deferred_Declaration_Flag(obj: Iir, value: Boolean) -> None: @BindToLibGHDL("vhdl__nodes__get_shared_flag") def Get_Shared_Flag(obj: Iir) -> Boolean: """""" + return 0 @export @@ -3291,6 +3416,7 @@ def Set_Shared_Flag(obj: Iir, value: Boolean) -> None: @BindToLibGHDL("vhdl__nodes__get_design_unit") def Get_Design_Unit(obj: Iir) -> Iir: """""" + return 0 @export @@ -3303,6 +3429,7 @@ def Set_Design_Unit(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_block_statement") def Get_Block_Statement(obj: Iir) -> Iir: """""" + return 0 @export @@ -3315,6 +3442,7 @@ def Set_Block_Statement(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_signal_driver") def Get_Signal_Driver(obj: Iir) -> Iir: """""" + return 0 @export @@ -3327,6 +3455,7 @@ def Set_Signal_Driver(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_declaration_chain") def Get_Declaration_Chain(obj: Iir) -> Iir: """""" + return 0 @export @@ -3339,6 +3468,7 @@ def Set_Declaration_Chain(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_file_logical_name") def Get_File_Logical_Name(obj: Iir) -> Iir: """""" + return 0 @export @@ -3351,6 +3481,7 @@ def Set_File_Logical_Name(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_file_open_kind") def Get_File_Open_Kind(obj: Iir) -> Iir: """""" + return 0 @export @@ -3363,6 +3494,7 @@ def Set_File_Open_Kind(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_element_position") def Get_Element_Position(obj: Iir) -> Iir: """""" + return 0 @export @@ -3375,6 +3507,7 @@ def Set_Element_Position(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_use_clause_chain") def Get_Use_Clause_Chain(obj: Iir) -> Iir: """""" + return 0 @export @@ -3387,6 +3520,7 @@ def Set_Use_Clause_Chain(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_context_reference_chain") def Get_Context_Reference_Chain(obj: Iir) -> Iir: """""" + return 0 @export @@ -3399,6 +3533,7 @@ def Set_Context_Reference_Chain(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_selected_name") def Get_Selected_Name(obj: Iir) -> Iir: """""" + return 0 @export @@ -3411,6 +3546,7 @@ def Set_Selected_Name(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_type_declarator") def Get_Type_Declarator(obj: Iir) -> Iir: """""" + return 0 @export @@ -3423,6 +3559,7 @@ def Set_Type_Declarator(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_complete_type_definition") def Get_Complete_Type_Definition(obj: Iir) -> Iir: """""" + return 0 @export @@ -3435,6 +3572,7 @@ def Set_Complete_Type_Definition(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_incomplete_type_ref_chain") def Get_Incomplete_Type_Ref_Chain(obj: Iir) -> Iir: """""" + return 0 @export @@ -3447,6 +3585,7 @@ def Set_Incomplete_Type_Ref_Chain(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_associated_type") def Get_Associated_Type(obj: Iir) -> Iir: """""" + return 0 @export @@ -3459,6 +3598,7 @@ def Set_Associated_Type(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_enumeration_literal_list") def Get_Enumeration_Literal_List(obj: Iir) -> Iir: """""" + return 0 @export @@ -3471,6 +3611,7 @@ def Set_Enumeration_Literal_List(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_entity_class_entry_chain") def Get_Entity_Class_Entry_Chain(obj: Iir) -> Iir: """""" + return 0 @export @@ -3483,6 +3624,7 @@ def Set_Entity_Class_Entry_Chain(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_group_constituent_list") def Get_Group_Constituent_List(obj: Iir) -> Iir: """""" + return 0 @export @@ -3495,6 +3637,7 @@ def Set_Group_Constituent_List(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_unit_chain") def Get_Unit_Chain(obj: Iir) -> Iir: """""" + return 0 @export @@ -3507,6 +3650,7 @@ def Set_Unit_Chain(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_primary_unit") def Get_Primary_Unit(obj: Iir) -> Iir: """""" + return 0 @export @@ -3519,6 +3663,7 @@ def Set_Primary_Unit(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_identifier") def Get_Identifier(obj: Iir) -> NameId: """""" + return 0 @export @@ -3531,6 +3676,7 @@ def Set_Identifier(obj: Iir, value: NameId) -> None: @BindToLibGHDL("vhdl__nodes__get_label") def Get_Label(obj: Iir) -> NameId: """""" + return 0 @export @@ -3543,6 +3689,7 @@ def Set_Label(obj: Iir, value: NameId) -> None: @BindToLibGHDL("vhdl__nodes__get_visible_flag") def Get_Visible_Flag(obj: Iir) -> Boolean: """""" + return 0 @export @@ -3555,6 +3702,7 @@ def Set_Visible_Flag(obj: Iir, value: Boolean) -> None: @BindToLibGHDL("vhdl__nodes__get_range_constraint") def Get_Range_Constraint(obj: Iir) -> Iir: """""" + return 0 @export @@ -3567,6 +3715,7 @@ def Set_Range_Constraint(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_direction") def Get_Direction(obj: Iir) -> DirectionType: """""" + return 0 @export @@ -3579,6 +3728,7 @@ def Set_Direction(obj: Iir, value: DirectionType) -> None: @BindToLibGHDL("vhdl__nodes__get_left_limit") def Get_Left_Limit(obj: Iir) -> Iir: """""" + return 0 @export @@ -3591,6 +3741,7 @@ def Set_Left_Limit(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_right_limit") def Get_Right_Limit(obj: Iir) -> Iir: """""" + return 0 @export @@ -3603,6 +3754,7 @@ def Set_Right_Limit(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_left_limit_expr") def Get_Left_Limit_Expr(obj: Iir) -> Iir: """""" + return 0 @export @@ -3615,6 +3767,7 @@ def Set_Left_Limit_Expr(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_right_limit_expr") def Get_Right_Limit_Expr(obj: Iir) -> Iir: """""" + return 0 @export @@ -3627,6 +3780,7 @@ def Set_Right_Limit_Expr(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_parent_type") def Get_Parent_Type(obj: Iir) -> Iir: """""" + return 0 @export @@ -3639,6 +3793,7 @@ def Set_Parent_Type(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_simple_nature") def Get_Simple_Nature(obj: Iir) -> Iir: """""" + return 0 @export @@ -3651,6 +3806,7 @@ def Set_Simple_Nature(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_base_nature") def Get_Base_Nature(obj: Iir) -> Iir: """""" + return 0 @export @@ -3663,6 +3819,7 @@ def Set_Base_Nature(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_resolution_indication") def Get_Resolution_Indication(obj: Iir) -> Iir: """""" + return 0 @export @@ -3675,6 +3832,7 @@ def Set_Resolution_Indication(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_record_element_resolution_chain") def Get_Record_Element_Resolution_Chain(obj: Iir) -> Iir: """""" + return 0 @export @@ -3687,6 +3845,7 @@ def Set_Record_Element_Resolution_Chain(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_tolerance") def Get_Tolerance(obj: Iir) -> Iir: """""" + return 0 @export @@ -3699,6 +3858,7 @@ def Set_Tolerance(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_plus_terminal_name") def Get_Plus_Terminal_Name(obj: Iir) -> Iir: """""" + return 0 @export @@ -3711,6 +3871,7 @@ def Set_Plus_Terminal_Name(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_minus_terminal_name") def Get_Minus_Terminal_Name(obj: Iir) -> Iir: """""" + return 0 @export @@ -3723,6 +3884,7 @@ def Set_Minus_Terminal_Name(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_plus_terminal") def Get_Plus_Terminal(obj: Iir) -> Iir: """""" + return 0 @export @@ -3735,6 +3897,7 @@ def Set_Plus_Terminal(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_minus_terminal") def Get_Minus_Terminal(obj: Iir) -> Iir: """""" + return 0 @export @@ -3747,6 +3910,7 @@ def Set_Minus_Terminal(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_magnitude_expression") def Get_Magnitude_Expression(obj: Iir) -> Iir: """""" + return 0 @export @@ -3759,6 +3923,7 @@ def Set_Magnitude_Expression(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_phase_expression") def Get_Phase_Expression(obj: Iir) -> Iir: """""" + return 0 @export @@ -3771,6 +3936,7 @@ def Set_Phase_Expression(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_power_expression") def Get_Power_Expression(obj: Iir) -> Iir: """""" + return 0 @export @@ -3783,6 +3949,7 @@ def Set_Power_Expression(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_simultaneous_left") def Get_Simultaneous_Left(obj: Iir) -> Iir: """""" + return 0 @export @@ -3795,6 +3962,7 @@ def Set_Simultaneous_Left(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_simultaneous_right") def Get_Simultaneous_Right(obj: Iir) -> Iir: """""" + return 0 @export @@ -3807,6 +3975,7 @@ def Set_Simultaneous_Right(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_text_file_flag") def Get_Text_File_Flag(obj: Iir) -> Boolean: """""" + return 0 @export @@ -3819,6 +3988,7 @@ def Set_Text_File_Flag(obj: Iir, value: Boolean) -> None: @BindToLibGHDL("vhdl__nodes__get_only_characters_flag") def Get_Only_Characters_Flag(obj: Iir) -> Boolean: """""" + return 0 @export @@ -3831,6 +4001,7 @@ def Set_Only_Characters_Flag(obj: Iir, value: Boolean) -> None: @BindToLibGHDL("vhdl__nodes__get_is_character_type") def Get_Is_Character_Type(obj: Iir) -> Boolean: """""" + return 0 @export @@ -3843,6 +4014,7 @@ def Set_Is_Character_Type(obj: Iir, value: Boolean) -> None: @BindToLibGHDL("vhdl__nodes__get_nature_staticness") def Get_Nature_Staticness(obj: Iir) -> Iir: """""" + return 0 @export @@ -3855,6 +4027,7 @@ def Set_Nature_Staticness(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_type_staticness") def Get_Type_Staticness(obj: Iir) -> Iir: """""" + return 0 @export @@ -3867,6 +4040,7 @@ def Set_Type_Staticness(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_constraint_state") def Get_Constraint_State(obj: Iir) -> Iir: """""" + return 0 @export @@ -3879,6 +4053,7 @@ def Set_Constraint_State(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_index_subtype_list") def Get_Index_Subtype_List(obj: Iir) -> Iir: """""" + return 0 @export @@ -3891,6 +4066,7 @@ def Set_Index_Subtype_List(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_index_subtype_definition_list") def Get_Index_Subtype_Definition_List(obj: Iir) -> Iir: """""" + return 0 @export @@ -3903,6 +4079,7 @@ def Set_Index_Subtype_Definition_List(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_element_subtype_indication") def Get_Element_Subtype_Indication(obj: Iir) -> Iir: """""" + return 0 @export @@ -3915,6 +4092,7 @@ def Set_Element_Subtype_Indication(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_element_subtype") def Get_Element_Subtype(obj: Iir) -> Iir: """""" + return 0 @export @@ -3927,6 +4105,7 @@ def Set_Element_Subtype(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_element_subnature_indication") def Get_Element_Subnature_Indication(obj: Iir) -> Iir: """""" + return 0 @export @@ -3939,6 +4118,7 @@ def Set_Element_Subnature_Indication(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_element_subnature") def Get_Element_Subnature(obj: Iir) -> Iir: """""" + return 0 @export @@ -3951,6 +4131,7 @@ def Set_Element_Subnature(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_index_constraint_list") def Get_Index_Constraint_List(obj: Iir) -> Iir: """""" + return 0 @export @@ -3963,6 +4144,7 @@ def Set_Index_Constraint_List(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_array_element_constraint") def Get_Array_Element_Constraint(obj: Iir) -> Iir: """""" + return 0 @export @@ -3975,6 +4157,7 @@ def Set_Array_Element_Constraint(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_has_array_constraint_flag") def Get_Has_Array_Constraint_Flag(obj: Iir) -> Boolean: """""" + return 0 @export @@ -3987,6 +4170,7 @@ def Set_Has_Array_Constraint_Flag(obj: Iir, value: Boolean) -> None: @BindToLibGHDL("vhdl__nodes__get_has_element_constraint_flag") def Get_Has_Element_Constraint_Flag(obj: Iir) -> Boolean: """""" + return 0 @export @@ -3999,6 +4183,7 @@ def Set_Has_Element_Constraint_Flag(obj: Iir, value: Boolean) -> None: @BindToLibGHDL("vhdl__nodes__get_elements_declaration_list") def Get_Elements_Declaration_List(obj: Iir) -> Iir: """""" + return 0 @export @@ -4011,6 +4196,7 @@ def Set_Elements_Declaration_List(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_owned_elements_chain") def Get_Owned_Elements_Chain(obj: Iir) -> Iir: """""" + return 0 @export @@ -4023,6 +4209,7 @@ def Set_Owned_Elements_Chain(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_designated_type") def Get_Designated_Type(obj: Iir) -> Iir: """""" + return 0 @export @@ -4035,6 +4222,7 @@ def Set_Designated_Type(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_designated_subtype_indication") def Get_Designated_Subtype_Indication(obj: Iir) -> Iir: """""" + return 0 @export @@ -4047,6 +4235,7 @@ def Set_Designated_Subtype_Indication(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_index_list") def Get_Index_List(obj: Iir) -> Iir: """""" + return 0 @export @@ -4059,6 +4248,7 @@ def Set_Index_List(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_reference") def Get_Reference(obj: Iir) -> Iir: """""" + return 0 @export @@ -4071,6 +4261,7 @@ def Set_Reference(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_nature_declarator") def Get_Nature_Declarator(obj: Iir) -> Iir: """""" + return 0 @export @@ -4083,6 +4274,7 @@ def Set_Nature_Declarator(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_across_type_mark") def Get_Across_Type_Mark(obj: Iir) -> Iir: """""" + return 0 @export @@ -4095,6 +4287,7 @@ def Set_Across_Type_Mark(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_through_type_mark") def Get_Through_Type_Mark(obj: Iir) -> Iir: """""" + return 0 @export @@ -4107,6 +4300,7 @@ def Set_Through_Type_Mark(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_across_type_definition") def Get_Across_Type_Definition(obj: Iir) -> Iir: """""" + return 0 @export @@ -4119,6 +4313,7 @@ def Set_Across_Type_Definition(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_through_type_definition") def Get_Through_Type_Definition(obj: Iir) -> Iir: """""" + return 0 @export @@ -4131,6 +4326,7 @@ def Set_Through_Type_Definition(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_across_type") def Get_Across_Type(obj: Iir) -> Iir: """""" + return 0 @export @@ -4143,6 +4339,7 @@ def Set_Across_Type(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_through_type") def Get_Through_Type(obj: Iir) -> Iir: """""" + return 0 @export @@ -4155,6 +4352,7 @@ def Set_Through_Type(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_target") def Get_Target(obj: Iir) -> Iir: """""" + return 0 @export @@ -4167,6 +4365,7 @@ def Set_Target(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_waveform_chain") def Get_Waveform_Chain(obj: Iir) -> Iir: """""" + return 0 @export @@ -4179,6 +4378,7 @@ def Set_Waveform_Chain(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_guard") def Get_Guard(obj: Iir) -> Iir: """""" + return 0 @export @@ -4191,6 +4391,7 @@ def Set_Guard(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_delay_mechanism") def Get_Delay_Mechanism(obj: Iir) -> Iir: """""" + return 0 @export @@ -4203,6 +4404,7 @@ def Set_Delay_Mechanism(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_reject_time_expression") def Get_Reject_Time_Expression(obj: Iir) -> Iir: """""" + return 0 @export @@ -4215,6 +4417,7 @@ def Set_Reject_Time_Expression(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_force_mode") def Get_Force_Mode(obj: Iir) -> Iir: """""" + return 0 @export @@ -4227,6 +4430,7 @@ def Set_Force_Mode(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_has_force_mode") def Get_Has_Force_Mode(obj: Iir) -> Boolean: """""" + return 0 @export @@ -4239,6 +4443,7 @@ def Set_Has_Force_Mode(obj: Iir, value: Boolean) -> None: @BindToLibGHDL("vhdl__nodes__get_sensitivity_list") def Get_Sensitivity_List(obj: Iir) -> Iir: """""" + return 0 @export @@ -4251,6 +4456,7 @@ def Set_Sensitivity_List(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_process_origin") def Get_Process_Origin(obj: Iir) -> Iir: """""" + return 0 @export @@ -4263,6 +4469,7 @@ def Set_Process_Origin(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_package_origin") def Get_Package_Origin(obj: Iir) -> Iir: """""" + return 0 @export @@ -4275,6 +4482,7 @@ def Set_Package_Origin(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_condition_clause") def Get_Condition_Clause(obj: Iir) -> Iir: """""" + return 0 @export @@ -4287,6 +4495,7 @@ def Set_Condition_Clause(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_break_element") def Get_Break_Element(obj: Iir) -> Iir: """""" + return 0 @export @@ -4299,6 +4508,7 @@ def Set_Break_Element(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_selector_quantity") def Get_Selector_Quantity(obj: Iir) -> Iir: """""" + return 0 @export @@ -4311,6 +4521,7 @@ def Set_Selector_Quantity(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_break_quantity") def Get_Break_Quantity(obj: Iir) -> Iir: """""" + return 0 @export @@ -4323,6 +4534,7 @@ def Set_Break_Quantity(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_timeout_clause") def Get_Timeout_Clause(obj: Iir) -> Iir: """""" + return 0 @export @@ -4335,6 +4547,7 @@ def Set_Timeout_Clause(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_postponed_flag") def Get_Postponed_Flag(obj: Iir) -> Boolean: """""" + return 0 @export @@ -4347,6 +4560,7 @@ def Set_Postponed_Flag(obj: Iir, value: Boolean) -> None: @BindToLibGHDL("vhdl__nodes__get_callees_list") def Get_Callees_List(obj: Iir) -> Iir: """""" + return 0 @export @@ -4359,6 +4573,7 @@ def Set_Callees_List(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_passive_flag") def Get_Passive_Flag(obj: Iir) -> Boolean: """""" + return 0 @export @@ -4371,6 +4586,7 @@ def Set_Passive_Flag(obj: Iir, value: Boolean) -> None: @BindToLibGHDL("vhdl__nodes__get_resolution_function_flag") def Get_Resolution_Function_Flag(obj: Iir) -> Boolean: """""" + return 0 @export @@ -4383,6 +4599,7 @@ def Set_Resolution_Function_Flag(obj: Iir, value: Boolean) -> None: @BindToLibGHDL("vhdl__nodes__get_wait_state") def Get_Wait_State(obj: Iir) -> TriStateType: """""" + return 0 @export @@ -4395,6 +4612,7 @@ def Set_Wait_State(obj: Iir, value: TriStateType) -> None: @BindToLibGHDL("vhdl__nodes__get_all_sensitized_state") def Get_All_Sensitized_State(obj: Iir) -> Iir: """""" + return 0 @export @@ -4407,6 +4625,7 @@ def Set_All_Sensitized_State(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_seen_flag") def Get_Seen_Flag(obj: Iir) -> Boolean: """""" + return 0 @export @@ -4419,6 +4638,7 @@ def Set_Seen_Flag(obj: Iir, value: Boolean) -> None: @BindToLibGHDL("vhdl__nodes__get_pure_flag") def Get_Pure_Flag(obj: Iir) -> Boolean: """""" + return 0 @export @@ -4431,6 +4651,7 @@ def Set_Pure_Flag(obj: Iir, value: Boolean) -> None: @BindToLibGHDL("vhdl__nodes__get_foreign_flag") def Get_Foreign_Flag(obj: Iir) -> Boolean: """""" + return 0 @export @@ -4443,6 +4664,7 @@ def Set_Foreign_Flag(obj: Iir, value: Boolean) -> None: @BindToLibGHDL("vhdl__nodes__get_resolved_flag") def Get_Resolved_Flag(obj: Iir) -> Boolean: """""" + return 0 @export @@ -4455,6 +4677,7 @@ def Set_Resolved_Flag(obj: Iir, value: Boolean) -> None: @BindToLibGHDL("vhdl__nodes__get_signal_type_flag") def Get_Signal_Type_Flag(obj: Iir) -> Boolean: """""" + return 0 @export @@ -4467,6 +4690,7 @@ def Set_Signal_Type_Flag(obj: Iir, value: Boolean) -> None: @BindToLibGHDL("vhdl__nodes__get_has_signal_flag") def Get_Has_Signal_Flag(obj: Iir) -> Boolean: """""" + return 0 @export @@ -4479,6 +4703,7 @@ def Set_Has_Signal_Flag(obj: Iir, value: Boolean) -> None: @BindToLibGHDL("vhdl__nodes__get_purity_state") def Get_Purity_State(obj: Iir) -> Iir: """""" + return 0 @export @@ -4491,6 +4716,7 @@ def Set_Purity_State(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_elab_flag") def Get_Elab_Flag(obj: Iir) -> Boolean: """""" + return 0 @export @@ -4503,6 +4729,7 @@ def Set_Elab_Flag(obj: Iir, value: Boolean) -> None: @BindToLibGHDL("vhdl__nodes__get_vendor_library_flag") def Get_Vendor_Library_Flag(obj: Iir) -> Boolean: """""" + return 0 @export @@ -4515,6 +4742,7 @@ def Set_Vendor_Library_Flag(obj: Iir, value: Boolean) -> None: @BindToLibGHDL("vhdl__nodes__get_configuration_mark_flag") def Get_Configuration_Mark_Flag(obj: Iir) -> Boolean: """""" + return 0 @export @@ -4527,6 +4755,7 @@ def Set_Configuration_Mark_Flag(obj: Iir, value: Boolean) -> None: @BindToLibGHDL("vhdl__nodes__get_configuration_done_flag") def Get_Configuration_Done_Flag(obj: Iir) -> Boolean: """""" + return 0 @export @@ -4539,6 +4768,7 @@ def Set_Configuration_Done_Flag(obj: Iir, value: Boolean) -> None: @BindToLibGHDL("vhdl__nodes__get_index_constraint_flag") def Get_Index_Constraint_Flag(obj: Iir) -> Boolean: """""" + return 0 @export @@ -4551,6 +4781,7 @@ def Set_Index_Constraint_Flag(obj: Iir, value: Boolean) -> None: @BindToLibGHDL("vhdl__nodes__get_hide_implicit_flag") def Get_Hide_Implicit_Flag(obj: Iir) -> Boolean: """""" + return 0 @export @@ -4563,6 +4794,7 @@ def Set_Hide_Implicit_Flag(obj: Iir, value: Boolean) -> None: @BindToLibGHDL("vhdl__nodes__get_assertion_condition") def Get_Assertion_Condition(obj: Iir) -> Iir: """""" + return 0 @export @@ -4575,6 +4807,7 @@ def Set_Assertion_Condition(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_report_expression") def Get_Report_Expression(obj: Iir) -> Iir: """""" + return 0 @export @@ -4587,6 +4820,7 @@ def Set_Report_Expression(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_severity_expression") def Get_Severity_Expression(obj: Iir) -> Iir: """""" + return 0 @export @@ -4599,6 +4833,7 @@ def Set_Severity_Expression(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_instantiated_unit") def Get_Instantiated_Unit(obj: Iir) -> Iir: """""" + return 0 @export @@ -4611,6 +4846,7 @@ def Set_Instantiated_Unit(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_generic_map_aspect_chain") def Get_Generic_Map_Aspect_Chain(obj: Iir) -> Iir: """""" + return 0 @export @@ -4623,6 +4859,7 @@ def Set_Generic_Map_Aspect_Chain(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_port_map_aspect_chain") def Get_Port_Map_Aspect_Chain(obj: Iir) -> Iir: """""" + return 0 @export @@ -4635,6 +4872,7 @@ def Set_Port_Map_Aspect_Chain(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_configuration_name") def Get_Configuration_Name(obj: Iir) -> Iir: """""" + return 0 @export @@ -4647,6 +4885,7 @@ def Set_Configuration_Name(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_component_configuration") def Get_Component_Configuration(obj: Iir) -> Iir: """""" + return 0 @export @@ -4659,6 +4898,7 @@ def Set_Component_Configuration(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_configuration_specification") def Get_Configuration_Specification(obj: Iir) -> Iir: """""" + return 0 @export @@ -4671,6 +4911,7 @@ def Set_Configuration_Specification(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_default_binding_indication") def Get_Default_Binding_Indication(obj: Iir) -> Iir: """""" + return 0 @export @@ -4683,6 +4924,7 @@ def Set_Default_Binding_Indication(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_default_configuration_declaration") def Get_Default_Configuration_Declaration(obj: Iir) -> Iir: """""" + return 0 @export @@ -4695,6 +4937,7 @@ def Set_Default_Configuration_Declaration(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_expression") def Get_Expression(obj: Iir) -> Iir: """""" + return 0 @export @@ -4707,6 +4950,7 @@ def Set_Expression(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_conditional_expression_chain") def Get_Conditional_Expression_Chain(obj: Iir) -> Iir: """""" + return 0 @export @@ -4719,6 +4963,7 @@ def Set_Conditional_Expression_Chain(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_allocator_designated_type") def Get_Allocator_Designated_Type(obj: Iir) -> Iir: """""" + return 0 @export @@ -4731,6 +4976,7 @@ def Set_Allocator_Designated_Type(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_selected_waveform_chain") def Get_Selected_Waveform_Chain(obj: Iir) -> Iir: """""" + return 0 @export @@ -4743,6 +4989,7 @@ def Set_Selected_Waveform_Chain(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_conditional_waveform_chain") def Get_Conditional_Waveform_Chain(obj: Iir) -> Iir: """""" + return 0 @export @@ -4755,6 +5002,7 @@ def Set_Conditional_Waveform_Chain(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_guard_expression") def Get_Guard_Expression(obj: Iir) -> Iir: """""" + return 0 @export @@ -4767,6 +5015,7 @@ def Set_Guard_Expression(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_guard_decl") def Get_Guard_Decl(obj: Iir) -> Iir: """""" + return 0 @export @@ -4779,6 +5028,7 @@ def Set_Guard_Decl(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_guard_sensitivity_list") def Get_Guard_Sensitivity_List(obj: Iir) -> Iir: """""" + return 0 @export @@ -4791,6 +5041,7 @@ def Set_Guard_Sensitivity_List(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_signal_attribute_chain") def Get_Signal_Attribute_Chain(obj: Iir) -> Iir: """""" + return 0 @export @@ -4803,6 +5054,7 @@ def Set_Signal_Attribute_Chain(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_block_block_configuration") def Get_Block_Block_Configuration(obj: Iir) -> Iir: """""" + return 0 @export @@ -4815,6 +5067,7 @@ def Set_Block_Block_Configuration(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_package_header") def Get_Package_Header(obj: Iir) -> Iir: """""" + return 0 @export @@ -4827,6 +5080,7 @@ def Set_Package_Header(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_block_header") def Get_Block_Header(obj: Iir) -> Iir: """""" + return 0 @export @@ -4839,6 +5093,7 @@ def Set_Block_Header(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_uninstantiated_package_name") def Get_Uninstantiated_Package_Name(obj: Iir) -> Iir: """""" + return 0 @export @@ -4851,6 +5106,7 @@ def Set_Uninstantiated_Package_Name(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_uninstantiated_package_decl") def Get_Uninstantiated_Package_Decl(obj: Iir) -> Iir: """""" + return 0 @export @@ -4863,6 +5119,7 @@ def Set_Uninstantiated_Package_Decl(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_instance_source_file") def Get_Instance_Source_File(obj: Iir) -> SourceFileEntry: """""" + return 0 @export @@ -4875,6 +5132,7 @@ def Set_Instance_Source_File(obj: Iir, value: SourceFileEntry) -> None: @BindToLibGHDL("vhdl__nodes__get_generate_block_configuration") def Get_Generate_Block_Configuration(obj: Iir) -> Iir: """""" + return 0 @export @@ -4887,6 +5145,7 @@ def Set_Generate_Block_Configuration(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_generate_statement_body") def Get_Generate_Statement_Body(obj: Iir) -> Iir: """""" + return 0 @export @@ -4899,6 +5158,7 @@ def Set_Generate_Statement_Body(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_alternative_label") def Get_Alternative_Label(obj: Iir) -> NameId: """""" + return 0 @export @@ -4911,6 +5171,7 @@ def Set_Alternative_Label(obj: Iir, value: NameId) -> None: @BindToLibGHDL("vhdl__nodes__get_generate_else_clause") def Get_Generate_Else_Clause(obj: Iir) -> Iir: """""" + return 0 @export @@ -4923,6 +5184,7 @@ def Set_Generate_Else_Clause(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_condition") def Get_Condition(obj: Iir) -> Iir: """""" + return 0 @export @@ -4935,6 +5197,7 @@ def Set_Condition(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_else_clause") def Get_Else_Clause(obj: Iir) -> Iir: """""" + return 0 @export @@ -4947,6 +5210,7 @@ def Set_Else_Clause(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_parameter_specification") def Get_Parameter_Specification(obj: Iir) -> Iir: """""" + return 0 @export @@ -4959,6 +5223,7 @@ def Set_Parameter_Specification(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_parent") def Get_Parent(obj: Iir) -> Iir: """""" + return 0 @export @@ -4971,6 +5236,7 @@ def Set_Parent(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_loop_label") def Get_Loop_Label(obj: Iir) -> Iir: """""" + return 0 @export @@ -4983,6 +5249,7 @@ def Set_Loop_Label(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_exit_flag") def Get_Exit_Flag(obj: Iir) -> Boolean: """""" + return 0 @export @@ -4995,6 +5262,7 @@ def Set_Exit_Flag(obj: Iir, value: Boolean) -> None: @BindToLibGHDL("vhdl__nodes__get_next_flag") def Get_Next_Flag(obj: Iir) -> Boolean: """""" + return 0 @export @@ -5007,6 +5275,7 @@ def Set_Next_Flag(obj: Iir, value: Boolean) -> None: @BindToLibGHDL("vhdl__nodes__get_component_name") def Get_Component_Name(obj: Iir) -> Iir: """""" + return 0 @export @@ -5019,6 +5288,7 @@ def Set_Component_Name(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_instantiation_list") def Get_Instantiation_List(obj: Iir) -> Iir: """""" + return 0 @export @@ -5031,6 +5301,7 @@ def Set_Instantiation_List(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_entity_aspect") def Get_Entity_Aspect(obj: Iir) -> Iir: """""" + return 0 @export @@ -5043,6 +5314,7 @@ def Set_Entity_Aspect(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_default_entity_aspect") def Get_Default_Entity_Aspect(obj: Iir) -> Iir: """""" + return 0 @export @@ -5055,6 +5327,7 @@ def Set_Default_Entity_Aspect(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_binding_indication") def Get_Binding_Indication(obj: Iir) -> Iir: """""" + return 0 @export @@ -5067,6 +5340,7 @@ def Set_Binding_Indication(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_named_entity") def Get_Named_Entity(obj: Iir) -> Iir: """""" + return 0 @export @@ -5079,6 +5353,7 @@ def Set_Named_Entity(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_referenced_name") def Get_Referenced_Name(obj: Iir) -> Iir: """""" + return 0 @export @@ -5091,6 +5366,7 @@ def Set_Referenced_Name(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_expr_staticness") def Get_Expr_Staticness(obj: Iir) -> Iir: """""" + return 0 @export @@ -5103,6 +5379,7 @@ def Set_Expr_Staticness(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_scalar_size") def Get_Scalar_Size(obj: Iir) -> ScalarSize: """""" + return 0 @export @@ -5115,6 +5392,7 @@ def Set_Scalar_Size(obj: Iir, value: ScalarSize) -> None: @BindToLibGHDL("vhdl__nodes__get_error_origin") def Get_Error_Origin(obj: Iir) -> Iir: """""" + return 0 @export @@ -5127,6 +5405,7 @@ def Set_Error_Origin(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_operand") def Get_Operand(obj: Iir) -> Iir: """""" + return 0 @export @@ -5139,6 +5418,7 @@ def Set_Operand(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_left") def Get_Left(obj: Iir) -> Iir: """""" + return 0 @export @@ -5151,6 +5431,7 @@ def Set_Left(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_right") def Get_Right(obj: Iir) -> Iir: """""" + return 0 @export @@ -5163,6 +5444,7 @@ def Set_Right(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_unit_name") def Get_Unit_Name(obj: Iir) -> Iir: """""" + return 0 @export @@ -5175,6 +5457,7 @@ def Set_Unit_Name(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_name") def Get_Name(obj: Iir) -> Iir: """""" + return 0 @export @@ -5187,6 +5470,7 @@ def Set_Name(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_group_template_name") def Get_Group_Template_Name(obj: Iir) -> Iir: """""" + return 0 @export @@ -5199,6 +5483,7 @@ def Set_Group_Template_Name(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_name_staticness") def Get_Name_Staticness(obj: Iir) -> Iir: """""" + return 0 @export @@ -5211,6 +5496,7 @@ def Set_Name_Staticness(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_prefix") def Get_Prefix(obj: Iir) -> Iir: """""" + return 0 @export @@ -5223,6 +5509,7 @@ def Set_Prefix(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_signature_prefix") def Get_Signature_Prefix(obj: Iir) -> Iir: """""" + return 0 @export @@ -5235,6 +5522,7 @@ def Set_Signature_Prefix(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_external_pathname") def Get_External_Pathname(obj: Iir) -> Iir: """""" + return 0 @export @@ -5247,6 +5535,7 @@ def Set_External_Pathname(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_pathname_suffix") def Get_Pathname_Suffix(obj: Iir) -> Iir: """""" + return 0 @export @@ -5259,6 +5548,7 @@ def Set_Pathname_Suffix(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_pathname_expression") def Get_Pathname_Expression(obj: Iir) -> Iir: """""" + return 0 @export @@ -5271,6 +5561,7 @@ def Set_Pathname_Expression(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_in_formal_flag") def Get_In_Formal_Flag(obj: Iir) -> Boolean: """""" + return 0 @export @@ -5283,6 +5574,7 @@ def Set_In_Formal_Flag(obj: Iir, value: Boolean) -> None: @BindToLibGHDL("vhdl__nodes__get_slice_subtype") def Get_Slice_Subtype(obj: Iir) -> Iir: """""" + return 0 @export @@ -5295,6 +5587,7 @@ def Set_Slice_Subtype(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_suffix") def Get_Suffix(obj: Iir) -> Iir: """""" + return 0 @export @@ -5307,6 +5600,7 @@ def Set_Suffix(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_index_subtype") def Get_Index_Subtype(obj: Iir) -> Iir: """""" + return 0 @export @@ -5319,6 +5613,7 @@ def Set_Index_Subtype(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_parameter") def Get_Parameter(obj: Iir) -> Iir: """""" + return 0 @export @@ -5331,6 +5626,7 @@ def Set_Parameter(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_parameter_2") def Get_Parameter_2(obj: Iir) -> Iir: """""" + return 0 @export @@ -5343,6 +5639,7 @@ def Set_Parameter_2(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_parameter_3") def Get_Parameter_3(obj: Iir) -> Iir: """""" + return 0 @export @@ -5355,6 +5652,7 @@ def Set_Parameter_3(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_parameter_4") def Get_Parameter_4(obj: Iir) -> Iir: """""" + return 0 @export @@ -5367,6 +5665,7 @@ def Set_Parameter_4(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_attr_chain") def Get_Attr_Chain(obj: Iir) -> Iir: """""" + return 0 @export @@ -5379,6 +5678,7 @@ def Set_Attr_Chain(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_signal_attribute_declaration") def Get_Signal_Attribute_Declaration(obj: Iir) -> Iir: """""" + return 0 @export @@ -5391,6 +5691,7 @@ def Set_Signal_Attribute_Declaration(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_actual_type") def Get_Actual_Type(obj: Iir) -> Iir: """""" + return 0 @export @@ -5403,6 +5704,7 @@ def Set_Actual_Type(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_actual_type_definition") def Get_Actual_Type_Definition(obj: Iir) -> Iir: """""" + return 0 @export @@ -5415,6 +5717,7 @@ def Set_Actual_Type_Definition(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_association_chain") def Get_Association_Chain(obj: Iir) -> Iir: """""" + return 0 @export @@ -5427,6 +5730,7 @@ def Set_Association_Chain(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_individual_association_chain") def Get_Individual_Association_Chain(obj: Iir) -> Iir: """""" + return 0 @export @@ -5439,6 +5743,7 @@ def Set_Individual_Association_Chain(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_subprogram_association_chain") def Get_Subprogram_Association_Chain(obj: Iir) -> Iir: """""" + return 0 @export @@ -5451,6 +5756,7 @@ def Set_Subprogram_Association_Chain(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_aggregate_info") def Get_Aggregate_Info(obj: Iir) -> Iir: """""" + return 0 @export @@ -5463,6 +5769,7 @@ def Set_Aggregate_Info(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_sub_aggregate_info") def Get_Sub_Aggregate_Info(obj: Iir) -> Iir: """""" + return 0 @export @@ -5475,6 +5782,7 @@ def Set_Sub_Aggregate_Info(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_aggr_dynamic_flag") def Get_Aggr_Dynamic_Flag(obj: Iir) -> Boolean: """""" + return 0 @export @@ -5487,6 +5795,7 @@ def Set_Aggr_Dynamic_Flag(obj: Iir, value: Boolean) -> None: @BindToLibGHDL("vhdl__nodes__get_aggr_min_length") def Get_Aggr_Min_Length(obj: Iir) -> Iir: """""" + return 0 @export @@ -5499,6 +5808,7 @@ def Set_Aggr_Min_Length(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_aggr_low_limit") def Get_Aggr_Low_Limit(obj: Iir) -> Iir: """""" + return 0 @export @@ -5511,6 +5821,7 @@ def Set_Aggr_Low_Limit(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_aggr_high_limit") def Get_Aggr_High_Limit(obj: Iir) -> Iir: """""" + return 0 @export @@ -5523,6 +5834,7 @@ def Set_Aggr_High_Limit(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_aggr_others_flag") def Get_Aggr_Others_Flag(obj: Iir) -> Boolean: """""" + return 0 @export @@ -5535,6 +5847,7 @@ def Set_Aggr_Others_Flag(obj: Iir, value: Boolean) -> None: @BindToLibGHDL("vhdl__nodes__get_aggr_named_flag") def Get_Aggr_Named_Flag(obj: Iir) -> Boolean: """""" + return 0 @export @@ -5547,6 +5860,7 @@ def Set_Aggr_Named_Flag(obj: Iir, value: Boolean) -> None: @BindToLibGHDL("vhdl__nodes__get_aggregate_expand_flag") def Get_Aggregate_Expand_Flag(obj: Iir) -> Boolean: """""" + return 0 @export @@ -5559,6 +5873,7 @@ def Set_Aggregate_Expand_Flag(obj: Iir, value: Boolean) -> None: @BindToLibGHDL("vhdl__nodes__get_association_choices_chain") def Get_Association_Choices_Chain(obj: Iir) -> Iir: """""" + return 0 @export @@ -5571,6 +5886,7 @@ def Set_Association_Choices_Chain(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_case_statement_alternative_chain") def Get_Case_Statement_Alternative_Chain(obj: Iir) -> Iir: """""" + return 0 @export @@ -5583,6 +5899,7 @@ def Set_Case_Statement_Alternative_Chain(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_choice_staticness") def Get_Choice_Staticness(obj: Iir) -> Iir: """""" + return 0 @export @@ -5595,6 +5912,7 @@ def Set_Choice_Staticness(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_procedure_call") def Get_Procedure_Call(obj: Iir) -> Iir: """""" + return 0 @export @@ -5607,6 +5925,7 @@ def Set_Procedure_Call(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_implementation") def Get_Implementation(obj: Iir) -> Iir: """""" + return 0 @export @@ -5619,6 +5938,7 @@ def Set_Implementation(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_parameter_association_chain") def Get_Parameter_Association_Chain(obj: Iir) -> Iir: """""" + return 0 @export @@ -5631,6 +5951,7 @@ def Set_Parameter_Association_Chain(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_method_object") def Get_Method_Object(obj: Iir) -> Iir: """""" + return 0 @export @@ -5643,6 +5964,7 @@ def Set_Method_Object(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_subtype_type_mark") def Get_Subtype_Type_Mark(obj: Iir) -> Iir: """""" + return 0 @export @@ -5655,6 +5977,7 @@ def Set_Subtype_Type_Mark(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_subnature_nature_mark") def Get_Subnature_Nature_Mark(obj: Iir) -> Iir: """""" + return 0 @export @@ -5667,6 +5990,7 @@ def Set_Subnature_Nature_Mark(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_type_conversion_subtype") def Get_Type_Conversion_Subtype(obj: Iir) -> Iir: """""" + return 0 @export @@ -5679,6 +6003,7 @@ def Set_Type_Conversion_Subtype(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_type_mark") def Get_Type_Mark(obj: Iir) -> Iir: """""" + return 0 @export @@ -5691,6 +6016,7 @@ def Set_Type_Mark(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_file_type_mark") def Get_File_Type_Mark(obj: Iir) -> Iir: """""" + return 0 @export @@ -5703,6 +6029,7 @@ def Set_File_Type_Mark(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_return_type_mark") def Get_Return_Type_Mark(obj: Iir) -> Iir: """""" + return 0 @export @@ -5715,6 +6042,7 @@ def Set_Return_Type_Mark(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_has_disconnect_flag") def Get_Has_Disconnect_Flag(obj: Iir) -> Boolean: """""" + return 0 @export @@ -5727,6 +6055,7 @@ def Set_Has_Disconnect_Flag(obj: Iir, value: Boolean) -> None: @BindToLibGHDL("vhdl__nodes__get_has_active_flag") def Get_Has_Active_Flag(obj: Iir) -> Boolean: """""" + return 0 @export @@ -5739,6 +6068,7 @@ def Set_Has_Active_Flag(obj: Iir, value: Boolean) -> None: @BindToLibGHDL("vhdl__nodes__get_is_within_flag") def Get_Is_Within_Flag(obj: Iir) -> Boolean: """""" + return 0 @export @@ -5751,6 +6081,7 @@ def Set_Is_Within_Flag(obj: Iir, value: Boolean) -> None: @BindToLibGHDL("vhdl__nodes__get_type_marks_list") def Get_Type_Marks_List(obj: Iir) -> Iir: """""" + return 0 @export @@ -5763,6 +6094,7 @@ def Set_Type_Marks_List(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_implicit_alias_flag") def Get_Implicit_Alias_Flag(obj: Iir) -> Boolean: """""" + return 0 @export @@ -5775,6 +6107,7 @@ def Set_Implicit_Alias_Flag(obj: Iir, value: Boolean) -> None: @BindToLibGHDL("vhdl__nodes__get_alias_signature") def Get_Alias_Signature(obj: Iir) -> Iir: """""" + return 0 @export @@ -5787,6 +6120,7 @@ def Set_Alias_Signature(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_attribute_signature") def Get_Attribute_Signature(obj: Iir) -> Iir: """""" + return 0 @export @@ -5799,6 +6133,7 @@ def Set_Attribute_Signature(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_overload_list") def Get_Overload_List(obj: Iir) -> Iir: """""" + return 0 @export @@ -5811,6 +6146,7 @@ def Set_Overload_List(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_simple_name_identifier") def Get_Simple_Name_Identifier(obj: Iir) -> NameId: """""" + return 0 @export @@ -5823,6 +6159,7 @@ def Set_Simple_Name_Identifier(obj: Iir, value: NameId) -> None: @BindToLibGHDL("vhdl__nodes__get_simple_name_subtype") def Get_Simple_Name_Subtype(obj: Iir) -> Iir: """""" + return 0 @export @@ -5835,6 +6172,7 @@ def Set_Simple_Name_Subtype(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_protected_type_body") def Get_Protected_Type_Body(obj: Iir) -> Iir: """""" + return 0 @export @@ -5847,6 +6185,7 @@ def Set_Protected_Type_Body(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_protected_type_declaration") def Get_Protected_Type_Declaration(obj: Iir) -> Iir: """""" + return 0 @export @@ -5859,6 +6198,7 @@ def Set_Protected_Type_Declaration(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_use_flag") def Get_Use_Flag(obj: Iir) -> Boolean: """""" + return 0 @export @@ -5871,6 +6211,7 @@ def Set_Use_Flag(obj: Iir, value: Boolean) -> None: @BindToLibGHDL("vhdl__nodes__get_end_has_reserved_id") def Get_End_Has_Reserved_Id(obj: Iir) -> Boolean: """""" + return 0 @export @@ -5883,6 +6224,7 @@ def Set_End_Has_Reserved_Id(obj: Iir, value: Boolean) -> None: @BindToLibGHDL("vhdl__nodes__get_end_has_identifier") def Get_End_Has_Identifier(obj: Iir) -> Boolean: """""" + return 0 @export @@ -5895,6 +6237,7 @@ def Set_End_Has_Identifier(obj: Iir, value: Boolean) -> None: @BindToLibGHDL("vhdl__nodes__get_end_has_postponed") def Get_End_Has_Postponed(obj: Iir) -> Boolean: """""" + return 0 @export @@ -5907,6 +6250,7 @@ def Set_End_Has_Postponed(obj: Iir, value: Boolean) -> None: @BindToLibGHDL("vhdl__nodes__get_has_label") def Get_Has_Label(obj: Iir) -> Boolean: """""" + return 0 @export @@ -5919,6 +6263,7 @@ def Set_Has_Label(obj: Iir, value: Boolean) -> None: @BindToLibGHDL("vhdl__nodes__get_has_begin") def Get_Has_Begin(obj: Iir) -> Boolean: """""" + return 0 @export @@ -5931,6 +6276,7 @@ def Set_Has_Begin(obj: Iir, value: Boolean) -> None: @BindToLibGHDL("vhdl__nodes__get_has_end") def Get_Has_End(obj: Iir) -> Boolean: """""" + return 0 @export @@ -5943,6 +6289,7 @@ def Set_Has_End(obj: Iir, value: Boolean) -> None: @BindToLibGHDL("vhdl__nodes__get_has_is") def Get_Has_Is(obj: Iir) -> Boolean: """""" + return 0 @export @@ -5955,6 +6302,7 @@ def Set_Has_Is(obj: Iir, value: Boolean) -> None: @BindToLibGHDL("vhdl__nodes__get_has_pure") def Get_Has_Pure(obj: Iir) -> Boolean: """""" + return 0 @export @@ -5967,6 +6315,7 @@ def Set_Has_Pure(obj: Iir, value: Boolean) -> None: @BindToLibGHDL("vhdl__nodes__get_has_body") def Get_Has_Body(obj: Iir) -> Boolean: """""" + return 0 @export @@ -5979,6 +6328,7 @@ def Set_Has_Body(obj: Iir, value: Boolean) -> None: @BindToLibGHDL("vhdl__nodes__get_has_parameter") def Get_Has_Parameter(obj: Iir) -> Boolean: """""" + return 0 @export @@ -5991,6 +6341,7 @@ def Set_Has_Parameter(obj: Iir, value: Boolean) -> None: @BindToLibGHDL("vhdl__nodes__get_has_component") def Get_Has_Component(obj: Iir) -> Boolean: """""" + return 0 @export @@ -6003,6 +6354,7 @@ def Set_Has_Component(obj: Iir, value: Boolean) -> None: @BindToLibGHDL("vhdl__nodes__get_has_identifier_list") def Get_Has_Identifier_List(obj: Iir) -> Boolean: """""" + return 0 @export @@ -6015,6 +6367,7 @@ def Set_Has_Identifier_List(obj: Iir, value: Boolean) -> None: @BindToLibGHDL("vhdl__nodes__get_has_mode") def Get_Has_Mode(obj: Iir) -> Boolean: """""" + return 0 @export @@ -6027,6 +6380,7 @@ def Set_Has_Mode(obj: Iir, value: Boolean) -> None: @BindToLibGHDL("vhdl__nodes__get_has_class") def Get_Has_Class(obj: Iir) -> Boolean: """""" + return 0 @export @@ -6039,6 +6393,7 @@ def Set_Has_Class(obj: Iir, value: Boolean) -> None: @BindToLibGHDL("vhdl__nodes__get_has_delay_mechanism") def Get_Has_Delay_Mechanism(obj: Iir) -> Boolean: """""" + return 0 @export @@ -6051,6 +6406,7 @@ def Set_Has_Delay_Mechanism(obj: Iir, value: Boolean) -> None: @BindToLibGHDL("vhdl__nodes__get_suspend_flag") def Get_Suspend_Flag(obj: Iir) -> Boolean: """""" + return 0 @export @@ -6063,6 +6419,7 @@ def Set_Suspend_Flag(obj: Iir, value: Boolean) -> None: @BindToLibGHDL("vhdl__nodes__get_is_ref") def Get_Is_Ref(obj: Iir) -> Boolean: """""" + return 0 @export @@ -6075,6 +6432,7 @@ def Set_Is_Ref(obj: Iir, value: Boolean) -> None: @BindToLibGHDL("vhdl__nodes__get_is_forward_ref") def Get_Is_Forward_Ref(obj: Iir) -> Boolean: """""" + return 0 @export @@ -6087,6 +6445,7 @@ def Set_Is_Forward_Ref(obj: Iir, value: Boolean) -> None: @BindToLibGHDL("vhdl__nodes__get_psl_property") def Get_Psl_Property(obj: Iir) -> PSLNode: """""" + return 0 @export @@ -6099,6 +6458,7 @@ def Set_Psl_Property(obj: Iir, value: PSLNode) -> None: @BindToLibGHDL("vhdl__nodes__get_psl_sequence") def Get_Psl_Sequence(obj: Iir) -> PSLNode: """""" + return 0 @export @@ -6111,6 +6471,7 @@ def Set_Psl_Sequence(obj: Iir, value: PSLNode) -> None: @BindToLibGHDL("vhdl__nodes__get_psl_declaration") def Get_Psl_Declaration(obj: Iir) -> PSLNode: """""" + return 0 @export @@ -6123,6 +6484,7 @@ def Set_Psl_Declaration(obj: Iir, value: PSLNode) -> None: @BindToLibGHDL("vhdl__nodes__get_psl_expression") def Get_Psl_Expression(obj: Iir) -> PSLNode: """""" + return 0 @export @@ -6135,6 +6497,7 @@ def Set_Psl_Expression(obj: Iir, value: PSLNode) -> None: @BindToLibGHDL("vhdl__nodes__get_psl_boolean") def Get_Psl_Boolean(obj: Iir) -> PSLNode: """""" + return 0 @export @@ -6147,6 +6510,7 @@ def Set_Psl_Boolean(obj: Iir, value: PSLNode) -> None: @BindToLibGHDL("vhdl__nodes__get_psl_clock") def Get_PSL_Clock(obj: Iir) -> PSLNode: """""" + return 0 @export @@ -6159,6 +6523,7 @@ def Set_PSL_Clock(obj: Iir, value: PSLNode) -> None: @BindToLibGHDL("vhdl__nodes__get_psl_nfa") def Get_PSL_NFA(obj: Iir) -> PSLNFA: """""" + return 0 @export @@ -6171,6 +6536,7 @@ def Set_PSL_NFA(obj: Iir, value: PSLNFA) -> None: @BindToLibGHDL("vhdl__nodes__get_psl_nbr_states") def Get_PSL_Nbr_States(obj: Iir) -> Int32: """""" + return 0 @export @@ -6183,6 +6549,7 @@ def Set_PSL_Nbr_States(obj: Iir, value: Int32) -> None: @BindToLibGHDL("vhdl__nodes__get_psl_clock_sensitivity") def Get_PSL_Clock_Sensitivity(obj: Iir) -> Iir: """""" + return 0 @export @@ -6195,6 +6562,7 @@ def Set_PSL_Clock_Sensitivity(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_psl_eos_flag") def Get_PSL_EOS_Flag(obj: Iir) -> Boolean: """""" + return 0 @export @@ -6207,6 +6575,7 @@ def Set_PSL_EOS_Flag(obj: Iir, value: Boolean) -> None: @BindToLibGHDL("vhdl__nodes__get_count_expression") def Get_Count_Expression(obj: Iir) -> Iir: """""" + return 0 @export @@ -6219,6 +6588,7 @@ def Set_Count_Expression(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_clock_expression") def Get_Clock_Expression(obj: Iir) -> Iir: """""" + return 0 @export @@ -6231,6 +6601,7 @@ def Set_Clock_Expression(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_default_clock") def Get_Default_Clock(obj: Iir) -> Iir: """""" + return 0 @export @@ -6243,6 +6614,7 @@ def Set_Default_Clock(obj: Iir, value: Iir) -> None: @BindToLibGHDL("vhdl__nodes__get_foreign_node") def Get_Foreign_Node(obj: Iir) -> Int32: """""" + return 0 @export diff --git a/pyGHDL/libghdl/vhdl/nodes_meta.py b/pyGHDL/libghdl/vhdl/nodes_meta.py index 0ad2b247e..c7ba7c5dd 100644 --- a/pyGHDL/libghdl/vhdl/nodes_meta.py +++ b/pyGHDL/libghdl/vhdl/nodes_meta.py @@ -25,6 +25,7 @@ def get_fields_first(K: IirKind) -> int: :param K: Node to get first array index from. """ + return 0 @export @@ -41,12 +42,14 @@ def get_fields_last(K: IirKind) -> int: :param K: Node to get last array index from. """ + return 0 @export @BindToLibGHDL("vhdl__nodes_meta__get_field_by_index") def get_field_by_index(K: IirKind) -> int: """""" + return 0 @export diff --git a/pyGHDL/libghdl/vhdl/nodes_utils.py b/pyGHDL/libghdl/vhdl/nodes_utils.py index 7cecb6825..31d495d85 100644 --- a/pyGHDL/libghdl/vhdl/nodes_utils.py +++ b/pyGHDL/libghdl/vhdl/nodes_utils.py @@ -48,6 +48,7 @@ def Strip_Denoting_Name(Name: Iir) -> Iir: :param Name: Simple or an expanded name. :return: Denoted declaration. """ + return 0 @export @@ -60,6 +61,7 @@ def Get_Entity(Decl: Iir) -> Iir: :param Decl: Declaration :return: Entity """ + return 0 @export @@ -73,6 +75,7 @@ def Is_Second_Subprogram_Specification(Spec: Iir) -> bool: :param Spec: Specification :return: ``True`` if subprogram specification and previously declared subprogram body match """ + return False @export @@ -87,6 +90,7 @@ def Get_Entity_From_Entity_Aspect(Aspect: Iir) -> Iir: :param Aspect: Aspect :return: Entity """ + return 0 @export @@ -99,3 +103,4 @@ def Get_Interface_Of_Formal(Formal: Iir) -> Iir: :param Formal: The formal. :return: The corresponding interface. """ + return 0 diff --git a/pyGHDL/libghdl/vhdl/parse.py b/pyGHDL/libghdl/vhdl/parse.py index c3135961f..a61cdfef7 100644 --- a/pyGHDL/libghdl/vhdl/parse.py +++ b/pyGHDL/libghdl/vhdl/parse.py @@ -57,3 +57,4 @@ def Parse_Design_File() -> Iir: :return: Return :obj:`~pyGHDL.libghdl.vhdl.nodes.Null_Iir` in case of error. Type: ``Iir_Design_File`` """ + return 0 diff --git a/pyGHDL/libghdl/vhdl/scanner.py b/pyGHDL/libghdl/vhdl/scanner.py index 15d41e9a9..f9db890a0 100644 --- a/pyGHDL/libghdl/vhdl/scanner.py +++ b/pyGHDL/libghdl/vhdl/scanner.py @@ -81,6 +81,7 @@ def Get_Current_Line() -> int: :return: Current token's line. """ + return 0 @export @@ -91,6 +92,7 @@ def Get_Token_Offset() -> int: :return: Current token's offset. """ + return 0 @export @@ -101,6 +103,7 @@ def Get_Token_Position(): :return: Current token's position. Type: ``Source_Ptr`` """ + return 0 @export @@ -111,6 +114,7 @@ def Get_Position(): :return: Current position. Type: ``Source_Ptr`` """ + return 0 @export @@ -123,3 +127,4 @@ def Current_Identifier() -> NameId: :return: NameId of the current token. """ + return 0 diff --git a/pyGHDL/libghdl/vhdl/sem_lib.py b/pyGHDL/libghdl/vhdl/sem_lib.py index c281a299c..0126c1ef5 100644 --- a/pyGHDL/libghdl/vhdl/sem_lib.py +++ b/pyGHDL/libghdl/vhdl/sem_lib.py @@ -47,6 +47,7 @@ def Load_File(File: SourceFileEntry) -> Iir_Design_File: :param File: File to analyse. :return: Return :attr:`~pyGHDL.libghdl.vhdl.nodes.Null_Iir` in case of parse error. Type: ``Iir_Design_File`` """ + return 0 @export diff --git a/scripts/pnodespy.py b/scripts/pnodespy.py index 1f016a82d..f1f637ea7 100755 --- a/scripts/pnodespy.py +++ b/scripts/pnodespy.py @@ -66,11 +66,13 @@ def do_iirs_subprg(): @BindToLibGHDL("{classname}__get_kind") def Get_Kind(node: Iir) -> IirKind: \"\"\"Get node kind.\"\"\" + return 0 @export @BindToLibGHDL("{classname}__get_location") def Get_Location(node: Iir) -> LocationType: \"\"\"\"\"\" + return 0 """).format(libname=libname, classname=classname) ) for k in pnodes.funcs: @@ -85,6 +87,7 @@ def do_iirs_subprg(): @BindToLibGHDL("{classname}__get_{kname_lower}") def Get_{kname}(obj: Iir) -> {rtype}: \"\"\"\"\"\" + return 0 @export @BindToLibGHDL("{classname}__set_{kname_lower}") def Set_{kname}(obj: Iir, value: {rtype}) -> None: @@ -259,6 +262,7 @@ def do_libghdl_meta(): :param K: Node to get first array index from. \"\"\" + return 0 @export @@ -275,11 +279,13 @@ def do_libghdl_meta(): :param K: Node to get last array index from. \"\"\" + return 0 @export @BindToLibGHDL("vhdl__nodes_meta__get_field_by_index") def get_field_by_index(K: IirKind) -> int: \"\"\"\"\"\" + return 0 @export def get_field_type(*args): |