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| author | Tristan Gingold <tgingold@free.fr> | 2023-03-02 07:46:07 +0100 |
|---|---|---|
| committer | Tristan Gingold <tgingold@free.fr> | 2023-03-02 07:46:41 +0100 |
| commit | 0c080e2d4a141d0c8fb447891f6520fb2712e4ae (patch) | |
| tree | 4bd6cd9f57df4f55d5373189604a11a5b66e1171 | |
| parent | a4c35e81f9981ae14ba358269335266b1ec620bf (diff) | |
| download | ghdl-0c080e2d4a141d0c8fb447891f6520fb2712e4ae.tar.gz ghdl-0c080e2d4a141d0c8fb447891f6520fb2712e4ae.tar.bz2 ghdl-0c080e2d4a141d0c8fb447891f6520fb2712e4ae.zip | |
testsuite/synth: add a test for #2369
| -rw-r--r-- | testsuite/synth/issue2369/bug.vhdl | 15 | ||||
| -rwxr-xr-x | testsuite/synth/issue2369/testsuite.sh | 8 |
2 files changed, 23 insertions, 0 deletions
diff --git a/testsuite/synth/issue2369/bug.vhdl b/testsuite/synth/issue2369/bug.vhdl new file mode 100644 index 000000000..df3e29787 --- /dev/null +++ b/testsuite/synth/issue2369/bug.vhdl @@ -0,0 +1,15 @@ +entity bug is + port (clk, x, y : in bit; z : out bit); +end entity bug; + +architecture RTL of bug is +begin + +process (clk) +begin + if rising_edge(clk) then + z <= x when y else unaffected; + end if; +end process; + +end architecture RTL; diff --git a/testsuite/synth/issue2369/testsuite.sh b/testsuite/synth/issue2369/testsuite.sh new file mode 100755 index 000000000..c355095b7 --- /dev/null +++ b/testsuite/synth/issue2369/testsuite.sh @@ -0,0 +1,8 @@ +#! /bin/sh + +. ../../testenv.sh + +GHDL_STD_FLAGS=--std=08 +synth_only bug + +echo "Test successful" |