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authorTristan Gingold <tgingold@free.fr>2020-01-08 20:35:54 +0100
committerTristan Gingold <tgingold@free.fr>2020-01-09 21:13:52 +0100
commit2a8b6abb8a06ebda88817c22ecb970eb7898ec04 (patch)
treef956eb79b154381e2224058577570a722dfc2f5a
parent37ca7ab57c45a1adb6d8e79f9dbe9fbb9e21d97a (diff)
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testsuite/synth: add a test for inertial associations.
-rw-r--r--testsuite/synth/anon01/anon01.vhdl23
-rw-r--r--testsuite/synth/anon01/tb_anon01.vhdl22
-rwxr-xr-xtestsuite/synth/anon01/testsuite.sh18
3 files changed, 63 insertions, 0 deletions
diff --git a/testsuite/synth/anon01/anon01.vhdl b/testsuite/synth/anon01/anon01.vhdl
new file mode 100644
index 000000000..892828073
--- /dev/null
+++ b/testsuite/synth/anon01/anon01.vhdl
@@ -0,0 +1,23 @@
+entity anon01_sub is
+ port (i : bit_vector (7 downto 0);
+ o : out bit_vector (7 downto 0));
+end anon01_sub;
+
+architecture behav of anon01_sub is
+begin
+ o <= i xor x"a5";
+end behav;
+
+entity anon01 is
+ port (i : bit_vector (6 downto 0);
+ o : out bit_vector (6 downto 0));
+end anon01;
+
+architecture behav of anon01 is
+ signal res : bit_vector (7 downto 0);
+begin
+ dut: entity work.anon01_sub
+ port map (i => '0' & i,
+ o => res);
+ o <= res (6 downto 0);
+end behav;
diff --git a/testsuite/synth/anon01/tb_anon01.vhdl b/testsuite/synth/anon01/tb_anon01.vhdl
new file mode 100644
index 000000000..88dc43939
--- /dev/null
+++ b/testsuite/synth/anon01/tb_anon01.vhdl
@@ -0,0 +1,22 @@
+entity tb_anon01 is
+end tb_anon01;
+
+architecture behav of tb_anon01 is
+ signal i, o : bit_vector(6 downto 0);
+begin
+ dut: entity work.anon01
+ port map (i, o);
+
+ process
+ begin
+ i <= b"000_0000";
+ wait for 1 ns;
+ assert o = b"010_0101" severity failure;
+
+ i <= b"111_1111";
+ wait for 1 ns;
+ assert o = b"101_1010" severity failure;
+
+ wait;
+ end process;
+end behav;
diff --git a/testsuite/synth/anon01/testsuite.sh b/testsuite/synth/anon01/testsuite.sh
new file mode 100755
index 000000000..254a334d6
--- /dev/null
+++ b/testsuite/synth/anon01/testsuite.sh
@@ -0,0 +1,18 @@
+#! /bin/sh
+
+. ../../testenv.sh
+
+GHDL_STD_FLAGS=--std=08
+
+for t in anon01; do
+ analyze $t.vhdl tb_$t.vhdl
+ elab_simulate tb_$t
+ clean
+
+ synth $t.vhdl -e $t > syn_$t.vhdl
+ analyze syn_$t.vhdl tb_$t.vhdl
+ elab_simulate tb_$t --ieee-asserts=disable-at-0
+ clean
+done
+
+echo "Test successful"