vhdl: recognize numeric_bit.to_unsigned

5 files changed, 283 insertions, 225 deletions

diff --git a/pyGHDL/libghdl/vhdl/nodes.py b/pyGHDL/libghdl/vhdl/nodes.py
index 70be92f3f..fa53dc67a 100644
--- a/pyGHDL/libghdl/vhdl/nodes.py
+++ b/pyGHDL/libghdl/vhdl/nodes.py
@@ -1642,226 +1642,232 @@ class Iir_Predefined(IntEnum):
     Ieee_Numeric_Std_Match_Suv = 445
     Ieee_Numeric_Std_To_01_Uns = 446
     Ieee_Numeric_Std_To_01_Sgn = 447
-    Ieee_Numeric_Std_Unsigned_To_Integer_Slv_Nat = 448
-    Ieee_Numeric_Std_Unsigned_To_Slv_Nat_Nat_Slv = 449
-    Ieee_Math_Real_Ceil = 450
-    Ieee_Math_Real_Floor = 451
-    Ieee_Math_Real_Round = 452
-    Ieee_Math_Real_Log2 = 453
-    Ieee_Math_Real_Sin = 454
-    Ieee_Math_Real_Cos = 455
-    Ieee_Math_Real_Arctan = 456
-    Ieee_Math_Real_Pow = 457
-    Ieee_Std_Logic_Unsigned_Add_Slv_Slv = 458
-    Ieee_Std_Logic_Unsigned_Add_Slv_Int = 459
-    Ieee_Std_Logic_Unsigned_Add_Int_Slv = 460
-    Ieee_Std_Logic_Unsigned_Add_Slv_Log = 461
-    Ieee_Std_Logic_Unsigned_Add_Log_Slv = 462
-    Ieee_Std_Logic_Unsigned_Sub_Slv_Slv = 463
-    Ieee_Std_Logic_Unsigned_Sub_Slv_Int = 464
-    Ieee_Std_Logic_Unsigned_Sub_Int_Slv = 465
-    Ieee_Std_Logic_Unsigned_Sub_Slv_Log = 466
-    Ieee_Std_Logic_Unsigned_Sub_Log_Slv = 467
-    Ieee_Std_Logic_Unsigned_Id_Slv = 468
-    Ieee_Std_Logic_Unsigned_Mul_Slv_Slv = 469
-    Ieee_Std_Logic_Unsigned_Lt_Slv_Slv = 470
-    Ieee_Std_Logic_Unsigned_Lt_Slv_Int = 471
-    Ieee_Std_Logic_Unsigned_Lt_Int_Slv = 472
-    Ieee_Std_Logic_Unsigned_Le_Slv_Slv = 473
-    Ieee_Std_Logic_Unsigned_Le_Slv_Int = 474
-    Ieee_Std_Logic_Unsigned_Le_Int_Slv = 475
-    Ieee_Std_Logic_Unsigned_Gt_Slv_Slv = 476
-    Ieee_Std_Logic_Unsigned_Gt_Slv_Int = 477
-    Ieee_Std_Logic_Unsigned_Gt_Int_Slv = 478
-    Ieee_Std_Logic_Unsigned_Ge_Slv_Slv = 479
-    Ieee_Std_Logic_Unsigned_Ge_Slv_Int = 480
-    Ieee_Std_Logic_Unsigned_Ge_Int_Slv = 481
-    Ieee_Std_Logic_Unsigned_Eq_Slv_Slv = 482
-    Ieee_Std_Logic_Unsigned_Eq_Slv_Int = 483
-    Ieee_Std_Logic_Unsigned_Eq_Int_Slv = 484
-    Ieee_Std_Logic_Unsigned_Ne_Slv_Slv = 485
-    Ieee_Std_Logic_Unsigned_Ne_Slv_Int = 486
-    Ieee_Std_Logic_Unsigned_Ne_Int_Slv = 487
-    Ieee_Std_Logic_Unsigned_Conv_Integer = 488
-    Ieee_Std_Logic_Unsigned_Shl = 489
-    Ieee_Std_Logic_Unsigned_Shr = 490
-    Ieee_Std_Logic_Signed_Add_Slv_Slv = 491
-    Ieee_Std_Logic_Signed_Add_Slv_Int = 492
-    Ieee_Std_Logic_Signed_Add_Int_Slv = 493
-    Ieee_Std_Logic_Signed_Add_Slv_Log = 494
-    Ieee_Std_Logic_Signed_Add_Log_Slv = 495
-    Ieee_Std_Logic_Signed_Sub_Slv_Slv = 496
-    Ieee_Std_Logic_Signed_Sub_Slv_Int = 497
-    Ieee_Std_Logic_Signed_Sub_Int_Slv = 498
-    Ieee_Std_Logic_Signed_Sub_Slv_Log = 499
-    Ieee_Std_Logic_Signed_Sub_Log_Slv = 500
-    Ieee_Std_Logic_Signed_Id_Slv = 501
-    Ieee_Std_Logic_Signed_Neg_Slv = 502
-    Ieee_Std_Logic_Signed_Abs_Slv = 503
-    Ieee_Std_Logic_Signed_Mul_Slv_Slv = 504
-    Ieee_Std_Logic_Signed_Lt_Slv_Slv = 505
-    Ieee_Std_Logic_Signed_Lt_Slv_Int = 506
-    Ieee_Std_Logic_Signed_Lt_Int_Slv = 507
-    Ieee_Std_Logic_Signed_Le_Slv_Slv = 508
-    Ieee_Std_Logic_Signed_Le_Slv_Int = 509
-    Ieee_Std_Logic_Signed_Le_Int_Slv = 510
-    Ieee_Std_Logic_Signed_Gt_Slv_Slv = 511
-    Ieee_Std_Logic_Signed_Gt_Slv_Int = 512
-    Ieee_Std_Logic_Signed_Gt_Int_Slv = 513
-    Ieee_Std_Logic_Signed_Ge_Slv_Slv = 514
-    Ieee_Std_Logic_Signed_Ge_Slv_Int = 515
-    Ieee_Std_Logic_Signed_Ge_Int_Slv = 516
-    Ieee_Std_Logic_Signed_Eq_Slv_Slv = 517
-    Ieee_Std_Logic_Signed_Eq_Slv_Int = 518
-    Ieee_Std_Logic_Signed_Eq_Int_Slv = 519
-    Ieee_Std_Logic_Signed_Ne_Slv_Slv = 520
-    Ieee_Std_Logic_Signed_Ne_Slv_Int = 521
-    Ieee_Std_Logic_Signed_Ne_Int_Slv = 522
-    Ieee_Std_Logic_Signed_Conv_Integer = 523
-    Ieee_Std_Logic_Signed_Shl = 524
-    Ieee_Std_Logic_Signed_Shr = 525
-    Ieee_Std_Logic_Arith_Conv_Unsigned_Int = 526
-    Ieee_Std_Logic_Arith_Conv_Unsigned_Uns = 527
-    Ieee_Std_Logic_Arith_Conv_Unsigned_Sgn = 528
-    Ieee_Std_Logic_Arith_Conv_Unsigned_Log = 529
-    Ieee_Std_Logic_Arith_Conv_Integer_Int = 530
-    Ieee_Std_Logic_Arith_Conv_Integer_Uns = 531
-    Ieee_Std_Logic_Arith_Conv_Integer_Sgn = 532
-    Ieee_Std_Logic_Arith_Conv_Integer_Log = 533
-    Ieee_Std_Logic_Arith_Conv_Vector_Int = 534
-    Ieee_Std_Logic_Arith_Conv_Vector_Uns = 535
-    Ieee_Std_Logic_Arith_Conv_Vector_Sgn = 536
-    Ieee_Std_Logic_Arith_Conv_Vector_Log = 537
-    Ieee_Std_Logic_Arith_Ext = 538
-    Ieee_Std_Logic_Arith_Sxt = 539
-    Ieee_Std_Logic_Arith_Id_Uns_Uns = 540
-    Ieee_Std_Logic_Arith_Id_Sgn_Sgn = 541
-    Ieee_Std_Logic_Arith_Neg_Sgn_Sgn = 542
-    Ieee_Std_Logic_Arith_Abs_Sgn_Sgn = 543
-    Ieee_Std_Logic_Arith_Shl_Uns = 544
-    Ieee_Std_Logic_Arith_Shl_Sgn = 545
-    Ieee_Std_Logic_Arith_Shr_Uns = 546
-    Ieee_Std_Logic_Arith_Shr_Sgn = 547
-    Ieee_Std_Logic_Arith_Id_Uns_Slv = 548
-    Ieee_Std_Logic_Arith_Id_Sgn_Slv = 549
-    Ieee_Std_Logic_Arith_Neg_Sgn_Slv = 550
-    Ieee_Std_Logic_Arith_Abs_Sgn_Slv = 551
-    Ieee_Std_Logic_Arith_Mul_Uns_Uns_Uns = 552
-    Ieee_Std_Logic_Arith_Mul_Sgn_Sgn_Sgn = 553
-    Ieee_Std_Logic_Arith_Mul_Sgn_Uns_Sgn = 554
-    Ieee_Std_Logic_Arith_Mul_Uns_Sgn_Sgn = 555
-    Ieee_Std_Logic_Arith_Mul_Uns_Uns_Slv = 556
-    Ieee_Std_Logic_Arith_Mul_Sgn_Sgn_Slv = 557
-    Ieee_Std_Logic_Arith_Mul_Sgn_Uns_Slv = 558
-    Ieee_Std_Logic_Arith_Mul_Uns_Sgn_Slv = 559
-    Ieee_Std_Logic_Arith_Add_Uns_Uns_Uns = 560
-    Ieee_Std_Logic_Arith_Add_Sgn_Sgn_Sgn = 561
-    Ieee_Std_Logic_Arith_Add_Uns_Sgn_Sgn = 562
-    Ieee_Std_Logic_Arith_Add_Sgn_Uns_Sgn = 563
-    Ieee_Std_Logic_Arith_Add_Uns_Int_Uns = 564
-    Ieee_Std_Logic_Arith_Add_Int_Uns_Uns = 565
-    Ieee_Std_Logic_Arith_Add_Sgn_Int_Sgn = 566
-    Ieee_Std_Logic_Arith_Add_Int_Sgn_Sgn = 567
-    Ieee_Std_Logic_Arith_Add_Uns_Log_Uns = 568
-    Ieee_Std_Logic_Arith_Add_Log_Uns_Uns = 569
-    Ieee_Std_Logic_Arith_Add_Sgn_Log_Sgn = 570
-    Ieee_Std_Logic_Arith_Add_Log_Sgn_Sgn = 571
-    Ieee_Std_Logic_Arith_Add_Uns_Uns_Slv = 572
-    Ieee_Std_Logic_Arith_Add_Sgn_Sgn_Slv = 573
-    Ieee_Std_Logic_Arith_Add_Uns_Sgn_Slv = 574
-    Ieee_Std_Logic_Arith_Add_Sgn_Uns_Slv = 575
-    Ieee_Std_Logic_Arith_Add_Uns_Int_Slv = 576
-    Ieee_Std_Logic_Arith_Add_Int_Uns_Slv = 577
-    Ieee_Std_Logic_Arith_Add_Sgn_Int_Slv = 578
-    Ieee_Std_Logic_Arith_Add_Int_Sgn_Slv = 579
-    Ieee_Std_Logic_Arith_Add_Uns_Log_Slv = 580
-    Ieee_Std_Logic_Arith_Add_Log_Uns_Slv = 581
-    Ieee_Std_Logic_Arith_Add_Sgn_Log_Slv = 582
-    Ieee_Std_Logic_Arith_Add_Log_Sgn_Slv = 583
-    Ieee_Std_Logic_Arith_Sub_Uns_Uns_Uns = 584
-    Ieee_Std_Logic_Arith_Sub_Sgn_Sgn_Sgn = 585
-    Ieee_Std_Logic_Arith_Sub_Uns_Sgn_Sgn = 586
-    Ieee_Std_Logic_Arith_Sub_Sgn_Uns_Sgn = 587
-    Ieee_Std_Logic_Arith_Sub_Uns_Int_Uns = 588
-    Ieee_Std_Logic_Arith_Sub_Int_Uns_Uns = 589
-    Ieee_Std_Logic_Arith_Sub_Sgn_Int_Sgn = 590
-    Ieee_Std_Logic_Arith_Sub_Int_Sgn_Sgn = 591
-    Ieee_Std_Logic_Arith_Sub_Uns_Log_Uns = 592
-    Ieee_Std_Logic_Arith_Sub_Log_Uns_Uns = 593
-    Ieee_Std_Logic_Arith_Sub_Sgn_Log_Sgn = 594
-    Ieee_Std_Logic_Arith_Sub_Log_Sgn_Sgn = 595
-    Ieee_Std_Logic_Arith_Sub_Uns_Uns_Slv = 596
-    Ieee_Std_Logic_Arith_Sub_Sgn_Sgn_Slv = 597
-    Ieee_Std_Logic_Arith_Sub_Uns_Sgn_Slv = 598
-    Ieee_Std_Logic_Arith_Sub_Sgn_Uns_Slv = 599
-    Ieee_Std_Logic_Arith_Sub_Uns_Int_Slv = 600
-    Ieee_Std_Logic_Arith_Sub_Int_Uns_Slv = 601
-    Ieee_Std_Logic_Arith_Sub_Sgn_Int_Slv = 602
-    Ieee_Std_Logic_Arith_Sub_Int_Sgn_Slv = 603
-    Ieee_Std_Logic_Arith_Sub_Uns_Log_Slv = 604
-    Ieee_Std_Logic_Arith_Sub_Log_Uns_Slv = 605
-    Ieee_Std_Logic_Arith_Sub_Sgn_Log_Slv = 606
-    Ieee_Std_Logic_Arith_Sub_Log_Sgn_Slv = 607
-    Ieee_Std_Logic_Arith_Lt_Uns_Uns = 608
-    Ieee_Std_Logic_Arith_Lt_Sgn_Sgn = 609
-    Ieee_Std_Logic_Arith_Lt_Uns_Sgn = 610
-    Ieee_Std_Logic_Arith_Lt_Sgn_Uns = 611
-    Ieee_Std_Logic_Arith_Lt_Uns_Int = 612
-    Ieee_Std_Logic_Arith_Lt_Int_Uns = 613
-    Ieee_Std_Logic_Arith_Lt_Sgn_Int = 614
-    Ieee_Std_Logic_Arith_Lt_Int_Sgn = 615
-    Ieee_Std_Logic_Arith_Le_Uns_Uns = 616
-    Ieee_Std_Logic_Arith_Le_Sgn_Sgn = 617
-    Ieee_Std_Logic_Arith_Le_Uns_Sgn = 618
-    Ieee_Std_Logic_Arith_Le_Sgn_Uns = 619
-    Ieee_Std_Logic_Arith_Le_Uns_Int = 620
-    Ieee_Std_Logic_Arith_Le_Int_Uns = 621
-    Ieee_Std_Logic_Arith_Le_Sgn_Int = 622
-    Ieee_Std_Logic_Arith_Le_Int_Sgn = 623
-    Ieee_Std_Logic_Arith_Gt_Uns_Uns = 624
-    Ieee_Std_Logic_Arith_Gt_Sgn_Sgn = 625
-    Ieee_Std_Logic_Arith_Gt_Uns_Sgn = 626
-    Ieee_Std_Logic_Arith_Gt_Sgn_Uns = 627
-    Ieee_Std_Logic_Arith_Gt_Uns_Int = 628
-    Ieee_Std_Logic_Arith_Gt_Int_Uns = 629
-    Ieee_Std_Logic_Arith_Gt_Sgn_Int = 630
-    Ieee_Std_Logic_Arith_Gt_Int_Sgn = 631
-    Ieee_Std_Logic_Arith_Ge_Uns_Uns = 632
-    Ieee_Std_Logic_Arith_Ge_Sgn_Sgn = 633
-    Ieee_Std_Logic_Arith_Ge_Uns_Sgn = 634
-    Ieee_Std_Logic_Arith_Ge_Sgn_Uns = 635
-    Ieee_Std_Logic_Arith_Ge_Uns_Int = 636
-    Ieee_Std_Logic_Arith_Ge_Int_Uns = 637
-    Ieee_Std_Logic_Arith_Ge_Sgn_Int = 638
-    Ieee_Std_Logic_Arith_Ge_Int_Sgn = 639
-    Ieee_Std_Logic_Arith_Eq_Uns_Uns = 640
-    Ieee_Std_Logic_Arith_Eq_Sgn_Sgn = 641
-    Ieee_Std_Logic_Arith_Eq_Uns_Sgn = 642
-    Ieee_Std_Logic_Arith_Eq_Sgn_Uns = 643
-    Ieee_Std_Logic_Arith_Eq_Uns_Int = 644
-    Ieee_Std_Logic_Arith_Eq_Int_Uns = 645
-    Ieee_Std_Logic_Arith_Eq_Sgn_Int = 646
-    Ieee_Std_Logic_Arith_Eq_Int_Sgn = 647
-    Ieee_Std_Logic_Arith_Ne_Uns_Uns = 648
-    Ieee_Std_Logic_Arith_Ne_Sgn_Sgn = 649
-    Ieee_Std_Logic_Arith_Ne_Uns_Sgn = 650
-    Ieee_Std_Logic_Arith_Ne_Sgn_Uns = 651
-    Ieee_Std_Logic_Arith_Ne_Uns_Int = 652
-    Ieee_Std_Logic_Arith_Ne_Int_Uns = 653
-    Ieee_Std_Logic_Arith_Ne_Sgn_Int = 654
-    Ieee_Std_Logic_Arith_Ne_Int_Sgn = 655
-    Ieee_Std_Logic_Misc_And_Reduce_Slv = 656
-    Ieee_Std_Logic_Misc_And_Reduce_Suv = 657
-    Ieee_Std_Logic_Misc_Nand_Reduce_Slv = 658
-    Ieee_Std_Logic_Misc_Nand_Reduce_Suv = 659
-    Ieee_Std_Logic_Misc_Or_Reduce_Slv = 660
-    Ieee_Std_Logic_Misc_Or_Reduce_Suv = 661
-    Ieee_Std_Logic_Misc_Nor_Reduce_Slv = 662
-    Ieee_Std_Logic_Misc_Nor_Reduce_Suv = 663
-    Ieee_Std_Logic_Misc_Xor_Reduce_Slv = 664
-    Ieee_Std_Logic_Misc_Xor_Reduce_Suv = 665
-    Ieee_Std_Logic_Misc_Xnor_Reduce_Slv = 666
-    Ieee_Std_Logic_Misc_Xnor_Reduce_Suv = 667
+    Ieee_Numeric_Bit_Toint_Uns_Nat = 448
+    Ieee_Numeric_Bit_Toint_Sgn_Int = 449
+    Ieee_Numeric_Bit_Touns_Nat_Nat_Uns = 450
+    Ieee_Numeric_Bit_Touns_Nat_Uns_Uns = 451
+    Ieee_Numeric_Bit_Tosgn_Int_Nat_Sgn = 452
+    Ieee_Numeric_Bit_Tosgn_Int_Sgn_Sgn = 453
+    Ieee_Numeric_Std_Unsigned_To_Integer_Slv_Nat = 454
+    Ieee_Numeric_Std_Unsigned_To_Slv_Nat_Nat_Slv = 455
+    Ieee_Math_Real_Ceil = 456
+    Ieee_Math_Real_Floor = 457
+    Ieee_Math_Real_Round = 458
+    Ieee_Math_Real_Log2 = 459
+    Ieee_Math_Real_Sin = 460
+    Ieee_Math_Real_Cos = 461
+    Ieee_Math_Real_Arctan = 462
+    Ieee_Math_Real_Pow = 463
+    Ieee_Std_Logic_Unsigned_Add_Slv_Slv = 464
+    Ieee_Std_Logic_Unsigned_Add_Slv_Int = 465
+    Ieee_Std_Logic_Unsigned_Add_Int_Slv = 466
+    Ieee_Std_Logic_Unsigned_Add_Slv_Log = 467
+    Ieee_Std_Logic_Unsigned_Add_Log_Slv = 468
+    Ieee_Std_Logic_Unsigned_Sub_Slv_Slv = 469
+    Ieee_Std_Logic_Unsigned_Sub_Slv_Int = 470
+    Ieee_Std_Logic_Unsigned_Sub_Int_Slv = 471
+    Ieee_Std_Logic_Unsigned_Sub_Slv_Log = 472
+    Ieee_Std_Logic_Unsigned_Sub_Log_Slv = 473
+    Ieee_Std_Logic_Unsigned_Id_Slv = 474
+    Ieee_Std_Logic_Unsigned_Mul_Slv_Slv = 475
+    Ieee_Std_Logic_Unsigned_Lt_Slv_Slv = 476
+    Ieee_Std_Logic_Unsigned_Lt_Slv_Int = 477
+    Ieee_Std_Logic_Unsigned_Lt_Int_Slv = 478
+    Ieee_Std_Logic_Unsigned_Le_Slv_Slv = 479
+    Ieee_Std_Logic_Unsigned_Le_Slv_Int = 480
+    Ieee_Std_Logic_Unsigned_Le_Int_Slv = 481
+    Ieee_Std_Logic_Unsigned_Gt_Slv_Slv = 482
+    Ieee_Std_Logic_Unsigned_Gt_Slv_Int = 483
+    Ieee_Std_Logic_Unsigned_Gt_Int_Slv = 484
+    Ieee_Std_Logic_Unsigned_Ge_Slv_Slv = 485
+    Ieee_Std_Logic_Unsigned_Ge_Slv_Int = 486
+    Ieee_Std_Logic_Unsigned_Ge_Int_Slv = 487
+    Ieee_Std_Logic_Unsigned_Eq_Slv_Slv = 488
+    Ieee_Std_Logic_Unsigned_Eq_Slv_Int = 489
+    Ieee_Std_Logic_Unsigned_Eq_Int_Slv = 490
+    Ieee_Std_Logic_Unsigned_Ne_Slv_Slv = 491
+    Ieee_Std_Logic_Unsigned_Ne_Slv_Int = 492
+    Ieee_Std_Logic_Unsigned_Ne_Int_Slv = 493
+    Ieee_Std_Logic_Unsigned_Conv_Integer = 494
+    Ieee_Std_Logic_Unsigned_Shl = 495
+    Ieee_Std_Logic_Unsigned_Shr = 496
+    Ieee_Std_Logic_Signed_Add_Slv_Slv = 497
+    Ieee_Std_Logic_Signed_Add_Slv_Int = 498
+    Ieee_Std_Logic_Signed_Add_Int_Slv = 499
+    Ieee_Std_Logic_Signed_Add_Slv_Log = 500
+    Ieee_Std_Logic_Signed_Add_Log_Slv = 501
+    Ieee_Std_Logic_Signed_Sub_Slv_Slv = 502
+    Ieee_Std_Logic_Signed_Sub_Slv_Int = 503
+    Ieee_Std_Logic_Signed_Sub_Int_Slv = 504
+    Ieee_Std_Logic_Signed_Sub_Slv_Log = 505
+    Ieee_Std_Logic_Signed_Sub_Log_Slv = 506
+    Ieee_Std_Logic_Signed_Id_Slv = 507
+    Ieee_Std_Logic_Signed_Neg_Slv = 508
+    Ieee_Std_Logic_Signed_Abs_Slv = 509
+    Ieee_Std_Logic_Signed_Mul_Slv_Slv = 510
+    Ieee_Std_Logic_Signed_Lt_Slv_Slv = 511
+    Ieee_Std_Logic_Signed_Lt_Slv_Int = 512
+    Ieee_Std_Logic_Signed_Lt_Int_Slv = 513
+    Ieee_Std_Logic_Signed_Le_Slv_Slv = 514
+    Ieee_Std_Logic_Signed_Le_Slv_Int = 515
+    Ieee_Std_Logic_Signed_Le_Int_Slv = 516
+    Ieee_Std_Logic_Signed_Gt_Slv_Slv = 517
+    Ieee_Std_Logic_Signed_Gt_Slv_Int = 518
+    Ieee_Std_Logic_Signed_Gt_Int_Slv = 519
+    Ieee_Std_Logic_Signed_Ge_Slv_Slv = 520
+    Ieee_Std_Logic_Signed_Ge_Slv_Int = 521
+    Ieee_Std_Logic_Signed_Ge_Int_Slv = 522
+    Ieee_Std_Logic_Signed_Eq_Slv_Slv = 523
+    Ieee_Std_Logic_Signed_Eq_Slv_Int = 524
+    Ieee_Std_Logic_Signed_Eq_Int_Slv = 525
+    Ieee_Std_Logic_Signed_Ne_Slv_Slv = 526
+    Ieee_Std_Logic_Signed_Ne_Slv_Int = 527
+    Ieee_Std_Logic_Signed_Ne_Int_Slv = 528
+    Ieee_Std_Logic_Signed_Conv_Integer = 529
+    Ieee_Std_Logic_Signed_Shl = 530
+    Ieee_Std_Logic_Signed_Shr = 531
+    Ieee_Std_Logic_Arith_Conv_Unsigned_Int = 532
+    Ieee_Std_Logic_Arith_Conv_Unsigned_Uns = 533
+    Ieee_Std_Logic_Arith_Conv_Unsigned_Sgn = 534
+    Ieee_Std_Logic_Arith_Conv_Unsigned_Log = 535
+    Ieee_Std_Logic_Arith_Conv_Integer_Int = 536
+    Ieee_Std_Logic_Arith_Conv_Integer_Uns = 537
+    Ieee_Std_Logic_Arith_Conv_Integer_Sgn = 538
+    Ieee_Std_Logic_Arith_Conv_Integer_Log = 539
+    Ieee_Std_Logic_Arith_Conv_Vector_Int = 540
+    Ieee_Std_Logic_Arith_Conv_Vector_Uns = 541
+    Ieee_Std_Logic_Arith_Conv_Vector_Sgn = 542
+    Ieee_Std_Logic_Arith_Conv_Vector_Log = 543
+    Ieee_Std_Logic_Arith_Ext = 544
+    Ieee_Std_Logic_Arith_Sxt = 545
+    Ieee_Std_Logic_Arith_Id_Uns_Uns = 546
+    Ieee_Std_Logic_Arith_Id_Sgn_Sgn = 547
+    Ieee_Std_Logic_Arith_Neg_Sgn_Sgn = 548
+    Ieee_Std_Logic_Arith_Abs_Sgn_Sgn = 549
+    Ieee_Std_Logic_Arith_Shl_Uns = 550
+    Ieee_Std_Logic_Arith_Shl_Sgn = 551
+    Ieee_Std_Logic_Arith_Shr_Uns = 552
+    Ieee_Std_Logic_Arith_Shr_Sgn = 553
+    Ieee_Std_Logic_Arith_Id_Uns_Slv = 554
+    Ieee_Std_Logic_Arith_Id_Sgn_Slv = 555
+    Ieee_Std_Logic_Arith_Neg_Sgn_Slv = 556
+    Ieee_Std_Logic_Arith_Abs_Sgn_Slv = 557
+    Ieee_Std_Logic_Arith_Mul_Uns_Uns_Uns = 558
+    Ieee_Std_Logic_Arith_Mul_Sgn_Sgn_Sgn = 559
+    Ieee_Std_Logic_Arith_Mul_Sgn_Uns_Sgn = 560
+    Ieee_Std_Logic_Arith_Mul_Uns_Sgn_Sgn = 561
+    Ieee_Std_Logic_Arith_Mul_Uns_Uns_Slv = 562
+    Ieee_Std_Logic_Arith_Mul_Sgn_Sgn_Slv = 563
+    Ieee_Std_Logic_Arith_Mul_Sgn_Uns_Slv = 564
+    Ieee_Std_Logic_Arith_Mul_Uns_Sgn_Slv = 565
+    Ieee_Std_Logic_Arith_Add_Uns_Uns_Uns = 566
+    Ieee_Std_Logic_Arith_Add_Sgn_Sgn_Sgn = 567
+    Ieee_Std_Logic_Arith_Add_Uns_Sgn_Sgn = 568
+    Ieee_Std_Logic_Arith_Add_Sgn_Uns_Sgn = 569
+    Ieee_Std_Logic_Arith_Add_Uns_Int_Uns = 570
+    Ieee_Std_Logic_Arith_Add_Int_Uns_Uns = 571
+    Ieee_Std_Logic_Arith_Add_Sgn_Int_Sgn = 572
+    Ieee_Std_Logic_Arith_Add_Int_Sgn_Sgn = 573
+    Ieee_Std_Logic_Arith_Add_Uns_Log_Uns = 574
+    Ieee_Std_Logic_Arith_Add_Log_Uns_Uns = 575
+    Ieee_Std_Logic_Arith_Add_Sgn_Log_Sgn = 576
+    Ieee_Std_Logic_Arith_Add_Log_Sgn_Sgn = 577
+    Ieee_Std_Logic_Arith_Add_Uns_Uns_Slv = 578
+    Ieee_Std_Logic_Arith_Add_Sgn_Sgn_Slv = 579
+    Ieee_Std_Logic_Arith_Add_Uns_Sgn_Slv = 580
+    Ieee_Std_Logic_Arith_Add_Sgn_Uns_Slv = 581
+    Ieee_Std_Logic_Arith_Add_Uns_Int_Slv = 582
+    Ieee_Std_Logic_Arith_Add_Int_Uns_Slv = 583
+    Ieee_Std_Logic_Arith_Add_Sgn_Int_Slv = 584
+    Ieee_Std_Logic_Arith_Add_Int_Sgn_Slv = 585
+    Ieee_Std_Logic_Arith_Add_Uns_Log_Slv = 586
+    Ieee_Std_Logic_Arith_Add_Log_Uns_Slv = 587
+    Ieee_Std_Logic_Arith_Add_Sgn_Log_Slv = 588
+    Ieee_Std_Logic_Arith_Add_Log_Sgn_Slv = 589
+    Ieee_Std_Logic_Arith_Sub_Uns_Uns_Uns = 590
+    Ieee_Std_Logic_Arith_Sub_Sgn_Sgn_Sgn = 591
+    Ieee_Std_Logic_Arith_Sub_Uns_Sgn_Sgn = 592
+    Ieee_Std_Logic_Arith_Sub_Sgn_Uns_Sgn = 593
+    Ieee_Std_Logic_Arith_Sub_Uns_Int_Uns = 594
+    Ieee_Std_Logic_Arith_Sub_Int_Uns_Uns = 595
+    Ieee_Std_Logic_Arith_Sub_Sgn_Int_Sgn = 596
+    Ieee_Std_Logic_Arith_Sub_Int_Sgn_Sgn = 597
+    Ieee_Std_Logic_Arith_Sub_Uns_Log_Uns = 598
+    Ieee_Std_Logic_Arith_Sub_Log_Uns_Uns = 599
+    Ieee_Std_Logic_Arith_Sub_Sgn_Log_Sgn = 600
+    Ieee_Std_Logic_Arith_Sub_Log_Sgn_Sgn = 601
+    Ieee_Std_Logic_Arith_Sub_Uns_Uns_Slv = 602
+    Ieee_Std_Logic_Arith_Sub_Sgn_Sgn_Slv = 603
+    Ieee_Std_Logic_Arith_Sub_Uns_Sgn_Slv = 604
+    Ieee_Std_Logic_Arith_Sub_Sgn_Uns_Slv = 605
+    Ieee_Std_Logic_Arith_Sub_Uns_Int_Slv = 606
+    Ieee_Std_Logic_Arith_Sub_Int_Uns_Slv = 607
+    Ieee_Std_Logic_Arith_Sub_Sgn_Int_Slv = 608
+    Ieee_Std_Logic_Arith_Sub_Int_Sgn_Slv = 609
+    Ieee_Std_Logic_Arith_Sub_Uns_Log_Slv = 610
+    Ieee_Std_Logic_Arith_Sub_Log_Uns_Slv = 611
+    Ieee_Std_Logic_Arith_Sub_Sgn_Log_Slv = 612
+    Ieee_Std_Logic_Arith_Sub_Log_Sgn_Slv = 613
+    Ieee_Std_Logic_Arith_Lt_Uns_Uns = 614
+    Ieee_Std_Logic_Arith_Lt_Sgn_Sgn = 615
+    Ieee_Std_Logic_Arith_Lt_Uns_Sgn = 616
+    Ieee_Std_Logic_Arith_Lt_Sgn_Uns = 617
+    Ieee_Std_Logic_Arith_Lt_Uns_Int = 618
+    Ieee_Std_Logic_Arith_Lt_Int_Uns = 619
+    Ieee_Std_Logic_Arith_Lt_Sgn_Int = 620
+    Ieee_Std_Logic_Arith_Lt_Int_Sgn = 621
+    Ieee_Std_Logic_Arith_Le_Uns_Uns = 622
+    Ieee_Std_Logic_Arith_Le_Sgn_Sgn = 623
+    Ieee_Std_Logic_Arith_Le_Uns_Sgn = 624
+    Ieee_Std_Logic_Arith_Le_Sgn_Uns = 625
+    Ieee_Std_Logic_Arith_Le_Uns_Int = 626
+    Ieee_Std_Logic_Arith_Le_Int_Uns = 627
+    Ieee_Std_Logic_Arith_Le_Sgn_Int = 628
+    Ieee_Std_Logic_Arith_Le_Int_Sgn = 629
+    Ieee_Std_Logic_Arith_Gt_Uns_Uns = 630
+    Ieee_Std_Logic_Arith_Gt_Sgn_Sgn = 631
+    Ieee_Std_Logic_Arith_Gt_Uns_Sgn = 632
+    Ieee_Std_Logic_Arith_Gt_Sgn_Uns = 633
+    Ieee_Std_Logic_Arith_Gt_Uns_Int = 634
+    Ieee_Std_Logic_Arith_Gt_Int_Uns = 635
+    Ieee_Std_Logic_Arith_Gt_Sgn_Int = 636
+    Ieee_Std_Logic_Arith_Gt_Int_Sgn = 637
+    Ieee_Std_Logic_Arith_Ge_Uns_Uns = 638
+    Ieee_Std_Logic_Arith_Ge_Sgn_Sgn = 639
+    Ieee_Std_Logic_Arith_Ge_Uns_Sgn = 640
+    Ieee_Std_Logic_Arith_Ge_Sgn_Uns = 641
+    Ieee_Std_Logic_Arith_Ge_Uns_Int = 642
+    Ieee_Std_Logic_Arith_Ge_Int_Uns = 643
+    Ieee_Std_Logic_Arith_Ge_Sgn_Int = 644
+    Ieee_Std_Logic_Arith_Ge_Int_Sgn = 645
+    Ieee_Std_Logic_Arith_Eq_Uns_Uns = 646
+    Ieee_Std_Logic_Arith_Eq_Sgn_Sgn = 647
+    Ieee_Std_Logic_Arith_Eq_Uns_Sgn = 648
+    Ieee_Std_Logic_Arith_Eq_Sgn_Uns = 649
+    Ieee_Std_Logic_Arith_Eq_Uns_Int = 650
+    Ieee_Std_Logic_Arith_Eq_Int_Uns = 651
+    Ieee_Std_Logic_Arith_Eq_Sgn_Int = 652
+    Ieee_Std_Logic_Arith_Eq_Int_Sgn = 653
+    Ieee_Std_Logic_Arith_Ne_Uns_Uns = 654
+    Ieee_Std_Logic_Arith_Ne_Sgn_Sgn = 655
+    Ieee_Std_Logic_Arith_Ne_Uns_Sgn = 656
+    Ieee_Std_Logic_Arith_Ne_Sgn_Uns = 657
+    Ieee_Std_Logic_Arith_Ne_Uns_Int = 658
+    Ieee_Std_Logic_Arith_Ne_Int_Uns = 659
+    Ieee_Std_Logic_Arith_Ne_Sgn_Int = 660
+    Ieee_Std_Logic_Arith_Ne_Int_Sgn = 661
+    Ieee_Std_Logic_Misc_And_Reduce_Slv = 662
+    Ieee_Std_Logic_Misc_And_Reduce_Suv = 663
+    Ieee_Std_Logic_Misc_Nand_Reduce_Slv = 664
+    Ieee_Std_Logic_Misc_Nand_Reduce_Suv = 665
+    Ieee_Std_Logic_Misc_Or_Reduce_Slv = 666
+    Ieee_Std_Logic_Misc_Or_Reduce_Suv = 667
+    Ieee_Std_Logic_Misc_Nor_Reduce_Slv = 668
+    Ieee_Std_Logic_Misc_Nor_Reduce_Suv = 669
+    Ieee_Std_Logic_Misc_Xor_Reduce_Slv = 670
+    Ieee_Std_Logic_Misc_Xor_Reduce_Suv = 671
+    Ieee_Std_Logic_Misc_Xnor_Reduce_Slv = 672
+    Ieee_Std_Logic_Misc_Xnor_Reduce_Suv = 673
 
 
 @export
diff --git a/src/vhdl/vhdl-ieee-numeric.adb b/src/vhdl/vhdl-ieee-numeric.adb
index 2e26eb187..96432df56 100644
--- a/src/vhdl/vhdl-ieee-numeric.adb
+++ b/src/vhdl/vhdl-ieee-numeric.adb
@@ -618,6 +618,9 @@ package body Vhdl.Ieee.Numeric is
          elsif Arg_Type = Ieee.Std_Logic_1164.Std_Logic_Vector_Type then
             Sign := Type_Slv;
             Kind := Arg_Vect;
+         elsif Arg_Type = Vhdl.Std_Package.Bit_Type_Definition then
+            Sign := Type_Log;
+            Kind := Arg_Scal;
          else
             raise Error;
          end if;
@@ -667,21 +670,36 @@ package body Vhdl.Ieee.Numeric is
          Set_Implicit_Definition (Decl, Pats (Pkg, Arg1_Sign));
       end Handle_Unary;
 
-      procedure Handle_To_Unsigned is
+      procedure Handle_To_Unsigned
+      is
+         Predefined : Iir_Predefined_Functions;
       begin
          if Arg1_Kind = Arg_Scal and Arg1_Sign = Type_Unsigned then
             if Arg2_Kind = Arg_Scal and Arg2_Sign = Type_Unsigned then
-               Set_Implicit_Definition
-                 (Decl, Iir_Predefined_Ieee_Numeric_Std_Touns_Nat_Nat_Uns);
+               case Pkg is
+                  when Pkg_Std =>
+                     Predefined :=
+                       Iir_Predefined_Ieee_Numeric_Std_Touns_Nat_Nat_Uns;
+                  when Pkg_Bit =>
+                     Predefined :=
+                       Iir_Predefined_Ieee_Numeric_Bit_Touns_Nat_Nat_Uns;
+               end case;
             elsif Arg2_Kind = Arg_Vect and Arg2_Sign = Type_Unsigned then
-               Set_Implicit_Definition
-                 (Decl, Iir_Predefined_Ieee_Numeric_Std_Touns_Nat_Uns_Uns);
+               case Pkg is
+                  when Pkg_Std =>
+                     Predefined :=
+                       Iir_Predefined_Ieee_Numeric_Std_Touns_Nat_Uns_Uns;
+                  when Pkg_Bit =>
+                     Predefined :=
+                       Iir_Predefined_Ieee_Numeric_Bit_Touns_Nat_Uns_Uns;
+               end case;
             else
                raise Error;
             end if;
          else
             raise Error;
          end if;
+         Set_Implicit_Definition (Decl, Predefined);
       end Handle_To_Unsigned;
 
       procedure Handle_To_Signed is
@@ -1048,4 +1066,18 @@ package body Vhdl.Ieee.Numeric is
          Numeric_Std_Unsigned_Type := Null_Iir;
          Numeric_Std_Signed_Type := Null_Iir;
    end Extract_Std_Declarations;
+
+   procedure Extract_Bit_Declarations (Pkg : Iir_Package_Declaration) is
+   begin
+      Numeric_Bit_Pkg := Pkg;
+
+      Extract_Declarations
+        (Pkg, Pkg_Bit, Numeric_Bit_Unsigned_Type, Numeric_Bit_Signed_Type);
+   exception
+      when Error =>
+         Error_Msg_Sem (+Pkg, "package ieee.numeric_bit is ill-formed");
+         Numeric_Bit_Pkg := Null_Iir;
+         Numeric_Bit_Unsigned_Type := Null_Iir;
+         Numeric_Bit_Signed_Type := Null_Iir;
+   end Extract_Bit_Declarations;
 end Vhdl.Ieee.Numeric;
diff --git a/src/vhdl/vhdl-ieee-numeric.ads b/src/vhdl/vhdl-ieee-numeric.ads
index 6a329d07c..7b2a7ae8c 100644
--- a/src/vhdl/vhdl-ieee-numeric.ads
+++ b/src/vhdl/vhdl-ieee-numeric.ads
@@ -19,6 +19,13 @@ package Vhdl.Ieee.Numeric is
    Numeric_Std_Unsigned_Type : Iir_Array_Type_Definition := Null_Iir;
    Numeric_Std_Signed_Type : Iir_Array_Type_Definition := Null_Iir;
 
+   Numeric_Bit_Pkg : Iir_Package_Declaration := Null_Iir;
+   Numeric_Bit_Unsigned_Type : Iir_Array_Type_Definition := Null_Iir;
+   Numeric_Bit_Signed_Type : Iir_Array_Type_Definition := Null_Iir;
+
    --  Extract declarations from PKG (ieee.numeric_std).
    procedure Extract_Std_Declarations (Pkg : Iir_Package_Declaration);
+
+   --  Extract declarations from PKG (ieee.numeric_bit).
+   procedure Extract_Bit_Declarations (Pkg : Iir_Package_Declaration);
 end Vhdl.Ieee.Numeric;
diff --git a/src/vhdl/vhdl-nodes.ads b/src/vhdl/vhdl-nodes.ads
index df51efb68..ae92272e1 100644
--- a/src/vhdl/vhdl-nodes.ads
+++ b/src/vhdl/vhdl-nodes.ads
@@ -5953,6 +5953,16 @@ package Vhdl.Nodes is
       Iir_Predefined_Ieee_Numeric_Std_To_01_Uns,
       Iir_Predefined_Ieee_Numeric_Std_To_01_Sgn,
 
+      --  numeric_bit
+
+      --  To_Integer, To_Unsigned, to_Signed
+      Iir_Predefined_Ieee_Numeric_Bit_Toint_Uns_Nat,
+      Iir_Predefined_Ieee_Numeric_Bit_Toint_Sgn_Int,
+      Iir_Predefined_Ieee_Numeric_Bit_Touns_Nat_Nat_Uns,
+      Iir_Predefined_Ieee_Numeric_Bit_Touns_Nat_Uns_Uns,
+      Iir_Predefined_Ieee_Numeric_Bit_Tosgn_Int_Nat_Sgn,
+      Iir_Predefined_Ieee_Numeric_Bit_Tosgn_Int_Sgn_Sgn,
+
       --  Numeric_Std_Unsigned (ieee2008)
       Iir_Predefined_Ieee_Numeric_Std_Unsigned_To_Integer_Slv_Nat,
       Iir_Predefined_Ieee_Numeric_Std_Unsigned_To_Slv_Nat_Nat_Slv,
diff --git a/src/vhdl/vhdl-post_sems.adb b/src/vhdl/vhdl-post_sems.adb
index d4748354d..cbf508f78 100644
--- a/src/vhdl/vhdl-post_sems.adb
+++ b/src/vhdl/vhdl-post_sems.adb
@@ -59,6 +59,9 @@ package body Vhdl.Post_Sems is
                   Vhdl.Ieee.Std_Logic_1164.Extract_Declarations (Lib_Unit);
                when Name_VITAL_Timing =>
                   Vhdl.Ieee.Vital_Timing.Extract_Declarations (Lib_Unit);
+               when Name_Numeric_Bit =>
+                  Vhdl.Ieee.Numeric.Extract_Bit_Declarations
+                    (Lib_Unit);
                when Name_Numeric_Std =>
                   Vhdl.Ieee.Numeric.Extract_Std_Declarations
                     (Lib_Unit);