aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorTristan Gingold <tgingold@free.fr>2023-01-12 07:52:32 +0100
committerTristan Gingold <tgingold@free.fr>2023-01-12 07:52:32 +0100
commit39a250b87928a2bd0f8da73a2b344ff2688515d2 (patch)
treee2278765b37cba683ee51d0295fa5d9a4dc02eb3
parente8af8a6605d710c254ca81b49bffae141bf73547 (diff)
downloadghdl-39a250b87928a2bd0f8da73a2b344ff2688515d2.tar.gz
ghdl-39a250b87928a2bd0f8da73a2b344ff2688515d2.tar.bz2
ghdl-39a250b87928a2bd0f8da73a2b344ff2688515d2.zip
ghdlsimul: handle automatic time resolution
-rw-r--r--src/ghdldrv/ghdlsimul.adb29
1 files changed, 17 insertions, 12 deletions
diff --git a/src/ghdldrv/ghdlsimul.adb b/src/ghdldrv/ghdlsimul.adb
index 05dd4f705..bb76bab24 100644
--- a/src/ghdldrv/ghdlsimul.adb
+++ b/src/ghdldrv/ghdlsimul.adb
@@ -122,12 +122,20 @@ package body Ghdlsimul is
end if;
end;
+ -- Handle automatic time resolution.
+ -- Must be done before elaboration, as time value could be computed.
+ if Time_Resolution = 'a' then
+ Time_Resolution := Vhdl.Std_Package.Get_Minimal_Time_Resolution;
+ if Time_Resolution = '?' then
+ Time_Resolution := 'f';
+ end if;
+ end if;
+ Vhdl.Std_Package.Set_Time_Resolution (Time_Resolution);
+
+ -- Set flags.
Synth.Flags.Flag_Simulation := True;
Synth.Errors.Debug_Handler := Elab.Debugger.Debug_Error'Access;
- Lib_Unit := Get_Library_Unit (Config);
- pragma Assert (Get_Kind (Lib_Unit) /= Iir_Kind_Foreign_Module);
-
-- Generic overriding.
Top := Vhdl.Utils.Get_Entity_From_Configuration (Config);
Vhdl.Configuration.Apply_Generic_Override (Top);
@@ -137,13 +145,18 @@ package body Ghdlsimul is
raise Errorout.Compilation_Error;
end if;
- -- The elaboration.
+ -- *THE* elaboration.
+ -- Compute values, instantiate..
+ Lib_Unit := Get_Library_Unit (Config);
+ pragma Assert (Get_Kind (Lib_Unit) /= Iir_Kind_Foreign_Module);
Inst := Elab.Vhdl_Insts.Elab_Top_Unit (Lib_Unit);
if Errorout.Nbr_Errors > 0 then
raise Errorout.Compilation_Error;
end if;
+ -- Finish elaboration: gather processes, signals.
+ -- Compute drivers, sources...
Simul.Vhdl_Elab.Gather_Processes (Inst);
Simul.Vhdl_Elab.Elab_Processes;
Simul.Vhdl_Elab.Compute_Sources;
@@ -197,14 +210,6 @@ package body Ghdlsimul is
return;
end if;
- if Time_Resolution = 'a' then
- Time_Resolution := Vhdl.Std_Package.Get_Minimal_Time_Resolution;
- if Time_Resolution = '?' then
- Time_Resolution := 'f';
- end if;
- end if;
- Vhdl.Std_Package.Set_Time_Resolution (Time_Resolution);
-
-- Overwrite time resolution in flag string.
Flags.Flag_String (5) := Time_Resolution;
Grtlink.Flag_String := Flags.Flag_String;